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[Qemu-devel] [PULL 01/12] target-arm: Add the Cortex-M4 CPU
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 01/12] target-arm: Add the Cortex-M4 CPU |
Date: |
Fri, 19 Jun 2015 14:47:05 +0100 |
From: "Aurelio C. Remonda" <address@hidden>
This patch adds the Cortex-M4 CPU. The M4 is basically the same as
the M3, the main differences being the DSP instructions and an
optional FPU. Only no-FPU cortex-M4 is implemented here, cortex-M4F
is not because the core target-arm code doesn't support the M-profile
FPU model yet.
Signed-off-by: Aurelio C. Remonda <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
---
target-arm/cpu.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/target-arm/cpu.c b/target-arm/cpu.c
index 7496983..524e841 100644
--- a/target-arm/cpu.c
+++ b/target-arm/cpu.c
@@ -812,6 +812,15 @@ static void cortex_m3_initfn(Object *obj)
cpu->midr = 0x410fc231;
}
+static void cortex_m4_initfn(Object *obj)
+{
+ ARMCPU *cpu = ARM_CPU(obj);
+
+ set_feature(&cpu->env, ARM_FEATURE_V7);
+ set_feature(&cpu->env, ARM_FEATURE_M);
+ set_feature(&cpu->env, ARM_FEATURE_THUMB_DSP);
+ cpu->midr = 0x410fc240; /* r0p0 */
+}
static void arm_v7m_class_init(ObjectClass *oc, void *data)
{
CPUClass *cc = CPU_CLASS(oc);
@@ -1214,6 +1223,8 @@ static const ARMCPUInfo arm_cpus[] = {
{ .name = "arm11mpcore", .initfn = arm11mpcore_initfn },
{ .name = "cortex-m3", .initfn = cortex_m3_initfn,
.class_init = arm_v7m_class_init },
+ { .name = "cortex-m4", .initfn = cortex_m4_initfn,
+ .class_init = arm_v7m_class_init },
{ .name = "cortex-a8", .initfn = cortex_a8_initfn },
{ .name = "cortex-a9", .initfn = cortex_a9_initfn },
{ .name = "cortex-a15", .initfn = cortex_a15_initfn },
--
1.9.1
- [Qemu-devel] [PULL 00/12] target-arm queue, Peter Maydell, 2015/06/19
- [Qemu-devel] [PULL 10/12] arm: xlnx-zynqmp: Add 2xCortexR5 CPUs, Peter Maydell, 2015/06/19
- [Qemu-devel] [PULL 01/12] target-arm: Add the Cortex-M4 CPU,
Peter Maydell <=
- [Qemu-devel] [PULL 09/12] arm: xlnx-zynqmp: Add boot-cpu property, Peter Maydell, 2015/06/19
- [Qemu-devel] [PULL 07/12] target-arm: Add support for Cortex-R5, Peter Maydell, 2015/06/19
- [Qemu-devel] [PULL 08/12] arm: xlnx-zynqmp: Preface CPU variables with "apu", Peter Maydell, 2015/06/19
- [Qemu-devel] [PULL 12/12] semihosting: add --semihosting-config arg sub-argument, Peter Maydell, 2015/06/19
- [Qemu-devel] [PULL 06/12] target-arm: Implement PMSAv7 MPU, Peter Maydell, 2015/06/19
- [Qemu-devel] [PULL 11/12] semihosting: create SemihostingConfig structure and semihost.h, Peter Maydell, 2015/06/19
- [Qemu-devel] [PULL 04/12] target-arm/helper.c: define MPUIR register, Peter Maydell, 2015/06/19
- [Qemu-devel] [PULL 05/12] target-arm: Add registers for PMSAv7, Peter Maydell, 2015/06/19
- [Qemu-devel] [PULL 02/12] hw/arm/sysbus-fdt: enable vfio-calxeda-xgmac dynamic instantiation, Peter Maydell, 2015/06/19
- [Qemu-devel] [PULL 03/12] target-arm: Do not reset sysregs marked as ALIAS, Peter Maydell, 2015/06/19