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[Qemu-devel] [PULL 00/12] target-arm queue
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 00/12] target-arm queue |
Date: |
Fri, 19 Jun 2015 14:47:04 +0100 |
target-arm queue, mostly a collection of the last few stray features
that have been on the list in plenty of time for softfreeze but didn't
quite make the previous pullreq.
I expect the "support GICv2m with virt board ACPI tables" patch also
to go in for 2.4, but it needs a little more review time. Other than that
I think we should be down to bugfix patches.
-- PMM
The following changes since commit ffdb1409a79c9cc91afd9f58df625fdca16bf8b9:
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-cocoa-20150619-1'
into staging (2015-06-19 12:54:08 +0100)
are available in the git repository at:
git://git.linaro.org/people/pmaydell/qemu-arm.git
tags/pull-target-arm-20150619
for you to fetch changes up to a59d31a1ebdce796a469242800db89bf09c94580:
semihosting: add --semihosting-config arg sub-argument (2015-06-19 14:17:45
+0100)
----------------------------------------------------------------
target-arm queue:
* support --semihosting-config,arg=value
* Cortex-R5 support (including implementing them on the Zynq board)
* Cortex-M4 support (without FPU)
* enable vfio-calxeda-xgmac
* don't reset ALIAS sysregs
----------------------------------------------------------------
Aurelio C. Remonda (1):
target-arm: Add the Cortex-M4 CPU
Eric Auger (1):
hw/arm/sysbus-fdt: enable vfio-calxeda-xgmac dynamic instantiation
Leon Alrae (2):
semihosting: create SemihostingConfig structure and semihost.h
semihosting: add --semihosting-config arg sub-argument
Peter Crosthwaite (7):
target-arm/helper.c: define MPUIR register
target-arm: Add registers for PMSAv7
target-arm: Implement PMSAv7 MPU
target-arm: Add support for Cortex-R5
arm: xlnx-zynqmp: Preface CPU variables with "apu"
arm: xlnx-zynqmp: Add boot-cpu property
arm: xlnx-zynqmp: Add 2xCortexR5 CPUs
Sergey Fedorov (1):
target-arm: Do not reset sysregs marked as ALIAS
gdbstub.c | 8 +-
hw/arm/sysbus-fdt.c | 73 ++++++++++
hw/arm/virt.c | 12 +-
hw/arm/xlnx-ep108.c | 2 +-
hw/arm/xlnx-zynqmp.c | 79 +++++++++--
include/exec/gdbstub.h | 6 -
include/exec/semihost.h | 62 +++++++++
include/hw/arm/fdt.h | 34 +++++
include/hw/arm/xlnx-zynqmp.h | 9 +-
include/sysemu/sysemu.h | 1 -
qemu-options.hx | 21 ++-
target-arm/arm-semi.c | 10 +-
target-arm/cpu-qom.h | 2 +
target-arm/cpu.c | 75 ++++++++++-
target-arm/cpu.h | 15 ++-
target-arm/helper.c | 309 ++++++++++++++++++++++++++++++++++++++-----
target-arm/machine.c | 34 +++++
target-lm32/helper.c | 3 +-
target-m68k/op_helper.c | 5 +-
target-xtensa/translate.c | 3 +-
vl.c | 104 +++++++++++++--
21 files changed, 770 insertions(+), 97 deletions(-)
create mode 100644 include/exec/semihost.h
create mode 100644 include/hw/arm/fdt.h
- [Qemu-devel] [PULL 00/12] target-arm queue,
Peter Maydell <=
- [Qemu-devel] [PULL 10/12] arm: xlnx-zynqmp: Add 2xCortexR5 CPUs, Peter Maydell, 2015/06/19
- [Qemu-devel] [PULL 01/12] target-arm: Add the Cortex-M4 CPU, Peter Maydell, 2015/06/19
- [Qemu-devel] [PULL 09/12] arm: xlnx-zynqmp: Add boot-cpu property, Peter Maydell, 2015/06/19
- [Qemu-devel] [PULL 07/12] target-arm: Add support for Cortex-R5, Peter Maydell, 2015/06/19
- [Qemu-devel] [PULL 08/12] arm: xlnx-zynqmp: Preface CPU variables with "apu", Peter Maydell, 2015/06/19
- [Qemu-devel] [PULL 12/12] semihosting: add --semihosting-config arg sub-argument, Peter Maydell, 2015/06/19
- [Qemu-devel] [PULL 06/12] target-arm: Implement PMSAv7 MPU, Peter Maydell, 2015/06/19
- [Qemu-devel] [PULL 11/12] semihosting: create SemihostingConfig structure and semihost.h, Peter Maydell, 2015/06/19
- [Qemu-devel] [PULL 04/12] target-arm/helper.c: define MPUIR register, Peter Maydell, 2015/06/19
- [Qemu-devel] [PULL 05/12] target-arm: Add registers for PMSAv7, Peter Maydell, 2015/06/19