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Re: [Qemu-devel] [PATCH] ich9: initialise RCBA register through LPC inte
From: |
Paolo Bonzini |
Subject: |
Re: [Qemu-devel] [PATCH] ich9: initialise RCBA register through LPC interface |
Date: |
Mon, 22 Jun 2015 15:06:06 +0200 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.6.0 |
On 27/05/2015 11:32, Paolo Bonzini wrote:
>
>
> On 27/05/2015 02:28, Paulo Alcantara wrote:
>> This patch initialises root complex register block BAR in order to
>> support TCO watchdog emulation features on QEMU.
>>
>> Signed-off-by: Paulo Alcantara <address@hidden>
>> ---
>> src/fw/dev-q35.h | 3 +++
>> src/fw/pciinit.c | 4 ++++
>> 2 files changed, 7 insertions(+)
>>
>> diff --git a/src/fw/dev-q35.h b/src/fw/dev-q35.h
>> index c6f8bd9..201825d 100644
>> --- a/src/fw/dev-q35.h
>> +++ b/src/fw/dev-q35.h
>> @@ -27,6 +27,9 @@
>> #define ICH9_LPC_GEN_PMCON_1_SMI_LOCK (1 << 4)
>> #define ICH9_LPC_PORT_ELCR1 0x4d0
>> #define ICH9_LPC_PORT_ELCR2 0x4d1
>> +#define ICH9_LPC_RCBA 0xf0
>> +#define ICH9_LPC_RCBA_ADDR 0xfed1c000
>> +#define ICH9_LPC_RCBA_EN 0x1
>> #define PCI_DEVICE_ID_INTEL_ICH9_SMBUS 0x2930
>> #define ICH9_SMB_SMB_BASE 0x20
>> #define ICH9_SMB_HOSTC 0x40
>> diff --git a/src/fw/pciinit.c b/src/fw/pciinit.c
>> index ac39d23..defccf3 100644
>> --- a/src/fw/pciinit.c
>> +++ b/src/fw/pciinit.c
>> @@ -183,6 +183,10 @@ static void mch_isa_bridge_setup(struct pci_device
>> *dev, void *arg)
>> /* acpi enable, SCI: IRQ9 000b = irq9*/
>> pci_config_writeb(bdf, ICH9_LPC_ACPI_CTRL, ICH9_LPC_ACPI_CTRL_ACPI_EN);
>>
>> + /* set root complex register block BAR */
>> + pci_config_writel(bdf, ICH9_LPC_RCBA,
>> + ICH9_LPC_RCBA_ADDR | ICH9_LPC_RCBA_EN);
>> +
>> acpi_pm1a_cnt = acpi_pm_base + 0x04;
>> pmtimer_setup(acpi_pm_base + 0x08);
>> }
>>
>
> Reviewed-by: Paolo Bonzini <address@hidden>
>
>
Ping? If TCO support is added to QEMU 2.4, we need this patch too.
Paolo
- Re: [Qemu-devel] [PATCH] ich9: initialise RCBA register through LPC interface,
Paolo Bonzini <=