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[Qemu-devel] [PATCH v2 04/18] target-arm: cpu: Move cpu_is_big_endian to
From: |
Peter Crosthwaite |
Subject: |
[Qemu-devel] [PATCH v2 04/18] target-arm: cpu: Move cpu_is_big_endian to header |
Date: |
Tue, 1 Mar 2016 22:56:08 -0800 |
From: Peter Crosthwaite <address@hidden>
There is a CPU data endianness test that is used to drive the
virtio_big_endian test.
Move this up to the header so it can be more generally used for endian
tests. The KVM specific cpu_syncronize_state call is left behind in the
virtio specific function.
Rename it arm_cpu-data_is_big_endian() to more accurately capture that
this is for data accesses only.
Reviewed-by: Alistair Francis <address@hidden>
Signed-off-by: Peter Crosthwaite <address@hidden>
---
TEST result: 0 (log@ logs/qemu-armeb-BE32-)
TEST result: 0 (log@ logs/qemu-armeb-BE8-)
TEST result: 0 (log@ logs/qemu-arm-LE-)
TEST result: 0 (log@ logs/qemu-system-arm-LE-)
Changed since v1:
rename to arm_cpu_data_is_big_endian (PMM review)
inline function to suppress compile warning.
target-arm/cpu.c | 19 +++----------------
target-arm/cpu.h | 19 +++++++++++++++++++
2 files changed, 22 insertions(+), 16 deletions(-)
diff --git a/target-arm/cpu.c b/target-arm/cpu.c
index 001fccf..352d9f8 100644
--- a/target-arm/cpu.c
+++ b/target-arm/cpu.c
@@ -369,26 +369,13 @@ static void arm_cpu_kvm_set_irq(void *opaque, int irq,
int level)
#endif
}
-static bool arm_cpu_is_big_endian(CPUState *cs)
+static bool arm_cpu_virtio_is_big_endian(CPUState *cs)
{
ARMCPU *cpu = ARM_CPU(cs);
CPUARMState *env = &cpu->env;
- int cur_el;
cpu_synchronize_state(cs);
-
- /* In 32bit guest endianness is determined by looking at CPSR's E bit */
- if (!is_a64(env)) {
- return (env->uncached_cpsr & CPSR_E) ? 1 : 0;
- }
-
- cur_el = arm_current_el(env);
-
- if (cur_el == 0) {
- return (env->cp15.sctlr_el[1] & SCTLR_E0E) != 0;
- }
-
- return (env->cp15.sctlr_el[cur_el] & SCTLR_EE) != 0;
+ return arm_cpu_data_is_big_endian(env);
}
#endif
@@ -1476,7 +1463,7 @@ static void arm_cpu_class_init(ObjectClass *oc, void
*data)
cc->get_phys_page_attrs_debug = arm_cpu_get_phys_page_attrs_debug;
cc->asidx_from_attrs = arm_asidx_from_attrs;
cc->vmsd = &vmstate_arm_cpu;
- cc->virtio_is_big_endian = arm_cpu_is_big_endian;
+ cc->virtio_is_big_endian = arm_cpu_virtio_is_big_endian;
cc->write_elf64_note = arm_cpu_write_elf64_note;
cc->write_elf32_note = arm_cpu_write_elf32_note;
#endif
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index 61b8b03..75e5ea0 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -1908,6 +1908,25 @@ static inline bool arm_sctlr_b(CPUARMState *env)
(env->cp15.sctlr_el[1] & SCTLR_B) != 0;
}
+/* Return true if the processor is in big-endian mode. */
+static inline bool arm_cpu_data_is_big_endian(CPUARMState *env)
+{
+ int cur_el;
+
+ /* In 32bit endianness is determined by looking at CPSR's E bit */
+ if (!is_a64(env)) {
+ return (env->uncached_cpsr & CPSR_E) ? 1 : 0;
+ }
+
+ cur_el = arm_current_el(env);
+
+ if (cur_el == 0) {
+ return (env->cp15.sctlr_el[1] & SCTLR_E0E) != 0;
+ }
+
+ return (env->cp15.sctlr_el[cur_el] & SCTLR_EE) != 0;
+}
+
#include "exec/cpu-all.h"
/* Bit usage in the TB flags field: bit 31 indicates whether we are
--
1.9.1
- [Qemu-devel] [PATCH v2 00/18] ARM big-endian and setend support, Peter Crosthwaite, 2016/03/02
- [Qemu-devel] [PATCH v2 01/18] linux-user: arm: fix coding style for some linux-user signal functions, Peter Crosthwaite, 2016/03/02
- [Qemu-devel] [PATCH v2 02/18] linux-user: arm: pass env to get_user_code_*, Peter Crosthwaite, 2016/03/02
- [Qemu-devel] [PATCH v2 04/18] target-arm: cpu: Move cpu_is_big_endian to header,
Peter Crosthwaite <=
- [Qemu-devel] [PATCH v2 03/18] target-arm: implement SCTLR.B, drop bswap_code, Peter Crosthwaite, 2016/03/02
- [Qemu-devel] [PATCH v2 05/18] arm: cpu: handle BE32 user-mode as BE, Peter Crosthwaite, 2016/03/02
- [Qemu-devel] [PATCH v2 06/18] linux-user: arm: set CPSR.E/SCTLR.E0E correctly for BE mode, Peter Crosthwaite, 2016/03/02
- [Qemu-devel] [PATCH v2 07/18] linux-user: arm: handle CPSR.E correctly in strex emulation, Peter Crosthwaite, 2016/03/02
- [Qemu-devel] [PATCH v2 08/18] target-arm: implement SCTLR.EE, Peter Crosthwaite, 2016/03/02
- [Qemu-devel] [PATCH v2 10/18] target-arm: introduce disas flag for endianness, Peter Crosthwaite, 2016/03/02
- [Qemu-devel] [PATCH v2 09/18] target-arm: pass DisasContext to gen_aa32_ld*/st*, Peter Crosthwaite, 2016/03/02
- [Qemu-devel] [PATCH v2 11/18] target-arm: a64: Add endianness support, Peter Crosthwaite, 2016/03/02
- [Qemu-devel] [PATCH v2 12/18] target-arm: introduce tbflag for endianness, Peter Crosthwaite, 2016/03/02