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[Qemu-devel] [PULL 17/30] linux-user: arm: handle CPSR.E correctly in st
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 17/30] linux-user: arm: handle CPSR.E correctly in strex emulation |
Date: |
Fri, 4 Mar 2016 11:41:40 +0000 |
From: Paolo Bonzini <address@hidden>
Now that CPSR.E is set correctly, prepare for when setend will be able
to change it; bswap data in and out of strex manually by comparing
SCTLR.B, CPSR.E and TARGET_WORDS_BIGENDIAN (we do not have the luxury
of using TCGMemOps).
Signed-off-by: Paolo Bonzini <address@hidden>
[ PC changes:
* Moved SCTLR/CPSR logic to arm_cpu_data_is_big_endian
]
Signed-off-by: Peter Crosthwaite <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
---
linux-user/main.c | 50 +++++++++++++++++++++++++++++++++++++++++++-------
target-arm/cpu.h | 11 +++++++++++
2 files changed, 54 insertions(+), 7 deletions(-)
diff --git a/linux-user/main.c b/linux-user/main.c
index 510b3b7..2b1e755 100644
--- a/linux-user/main.c
+++ b/linux-user/main.c
@@ -451,6 +451,38 @@ void cpu_loop(CPUX86State *env)
__r; \
})
+#define get_user_data_u32(x, gaddr, env) \
+ ({ abi_long __r = get_user_u32((x), (gaddr)); \
+ if (!__r && arm_cpu_bswap_data(env)) { \
+ (x) = bswap32(x); \
+ } \
+ __r; \
+ })
+
+#define get_user_data_u16(x, gaddr, env) \
+ ({ abi_long __r = get_user_u16((x), (gaddr)); \
+ if (!__r && arm_cpu_bswap_data(env)) { \
+ (x) = bswap16(x); \
+ } \
+ __r; \
+ })
+
+#define put_user_data_u32(x, gaddr, env) \
+ ({ typeof(x) __x = (x); \
+ if (arm_cpu_bswap_data(env)) { \
+ __x = bswap32(__x); \
+ } \
+ put_user_u32(__x, (gaddr)); \
+ })
+
+#define put_user_data_u16(x, gaddr, env) \
+ ({ typeof(x) __x = (x); \
+ if (arm_cpu_bswap_data(env)) { \
+ __x = bswap16(__x); \
+ } \
+ put_user_u16(__x, (gaddr)); \
+ })
+
#ifdef TARGET_ABI32
/* Commpage handling -- there is no commpage for AArch64 */
@@ -610,11 +642,11 @@ static int do_strex(CPUARMState *env)
segv = get_user_u8(val, addr);
break;
case 1:
- segv = get_user_u16(val, addr);
+ segv = get_user_data_u16(val, addr, env);
break;
case 2:
case 3:
- segv = get_user_u32(val, addr);
+ segv = get_user_data_u32(val, addr, env);
break;
default:
abort();
@@ -625,12 +657,16 @@ static int do_strex(CPUARMState *env)
}
if (size == 3) {
uint32_t valhi;
- segv = get_user_u32(valhi, addr + 4);
+ segv = get_user_data_u32(valhi, addr + 4, env);
if (segv) {
env->exception.vaddress = addr + 4;
goto done;
}
- val = deposit64(val, 32, 32, valhi);
+ if (arm_cpu_bswap_data(env)) {
+ val = deposit64((uint64_t)valhi, 32, 32, val);
+ } else {
+ val = deposit64(val, 32, 32, valhi);
+ }
}
if (val != env->exclusive_val) {
goto fail;
@@ -642,11 +678,11 @@ static int do_strex(CPUARMState *env)
segv = put_user_u8(val, addr);
break;
case 1:
- segv = put_user_u16(val, addr);
+ segv = put_user_data_u16(val, addr, env);
break;
case 2:
case 3:
- segv = put_user_u32(val, addr);
+ segv = put_user_data_u32(val, addr, env);
break;
}
if (segv) {
@@ -655,7 +691,7 @@ static int do_strex(CPUARMState *env)
}
if (size == 3) {
val = env->regs[(env->exclusive_info >> 12) & 0xf];
- segv = put_user_u32(val, addr + 4);
+ segv = put_user_data_u32(val, addr + 4, env);
if (segv) {
env->exception.vaddress = addr + 4;
goto done;
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index ab0ea92..cbf171c 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -2102,6 +2102,17 @@ static inline int fp_exception_el(CPUARMState *env)
return 0;
}
+#ifdef CONFIG_USER_ONLY
+static inline bool arm_cpu_bswap_data(CPUARMState *env)
+{
+ return
+#ifdef TARGET_WORDS_BIGENDIAN
+ 1 ^
+#endif
+ arm_cpu_data_is_big_endian(env);
+}
+#endif
+
static inline void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc,
target_ulong *cs_base, int *flags)
{
--
1.9.1
- [Qemu-devel] [PULL 12/30] linux-user: arm: pass env to get_user_code_*, (continued)
- [Qemu-devel] [PULL 12/30] linux-user: arm: pass env to get_user_code_*, Peter Maydell, 2016/03/04
- [Qemu-devel] [PULL 10/30] bcm2835_mbox/property: replace ldl_phys/stl_phys with endian-specific accesses, Peter Maydell, 2016/03/04
- [Qemu-devel] [PULL 16/30] linux-user: arm: set CPSR.E/SCTLR.E0E correctly for BE mode, Peter Maydell, 2016/03/04
- [Qemu-devel] [PULL 07/30] hw/arm/virt: Load bios image to MemoryRegion, not physaddr, Peter Maydell, 2016/03/04
- [Qemu-devel] [PULL 14/30] target-arm: cpu: Move cpu_is_big_endian to header, Peter Maydell, 2016/03/04
- [Qemu-devel] [PULL 22/30] target-arm: introduce tbflag for endianness, Peter Maydell, 2016/03/04
- [Qemu-devel] [PULL 06/30] loader: Add load_image_mr() to load ROM image to a MemoryRegion, Peter Maydell, 2016/03/04
- [Qemu-devel] [PULL 19/30] target-arm: pass DisasContext to gen_aa32_ld*/st*, Peter Maydell, 2016/03/04
- [Qemu-devel] [PULL 08/30] hw/arm/virt: Make first flash device Secure-only if booting secure, Peter Maydell, 2016/03/04
- [Qemu-devel] [PULL 15/30] arm: cpu: handle BE32 user-mode as BE, Peter Maydell, 2016/03/04
- [Qemu-devel] [PULL 17/30] linux-user: arm: handle CPSR.E correctly in strex emulation,
Peter Maydell <=
- [Qemu-devel] [PULL 28/30] arm: boot: Support big-endian elfs, Peter Maydell, 2016/03/04
- [Qemu-devel] [PULL 05/30] hw/arm/virt: Provide a secure-only RAM if booting in Secure mode, Peter Maydell, 2016/03/04
- [Qemu-devel] [PULL 18/30] target-arm: implement SCTLR.EE, Peter Maydell, 2016/03/04
- [Qemu-devel] [PULL 23/30] target-arm: implement setend, Peter Maydell, 2016/03/04
- [Qemu-devel] [PULL 26/30] loader: load_elf(): Add doc comment, Peter Maydell, 2016/03/04
- [Qemu-devel] [PULL 09/30] hw/arm/virt: Assume EL3 boot rom will handle PSCI if one is provided, Peter Maydell, 2016/03/04
- [Qemu-devel] [PULL 11/30] linux-user: arm: fix coding style for some linux-user signal functions, Peter Maydell, 2016/03/04
- [Qemu-devel] [PULL 13/30] target-arm: implement SCTLR.B, drop bswap_code, Peter Maydell, 2016/03/04
- [Qemu-devel] [PULL 21/30] target-arm: a64: Add endianness support, Peter Maydell, 2016/03/04
- [Qemu-devel] [PULL 25/30] loader: add API to load elf header, Peter Maydell, 2016/03/04