[Qemu-devel] [PATCH v2 0/8] mips: implement Inter-Thread Communication Unit

[Leon Alrae]

Here's version 2 of the ITC feature. The main change is that this patchset
is rebased on top of CPS patch series and now ITU block is created within
the CPS container instead of Malta board directly.

Original description in version 1 of the series:
https://lists.gnu.org/archive/html/qemu-devel/2016-02/msg00735.html

v2:
* rebased on top of CPS patchset and now ITU is created inside CPS
* merged patches #1 and #2 into single patch and moved few lines from
  realize to reset function
* using memory_region_transaction_{begin,commit} during ITC reconfiguration
* calling itc_reconfiguration also on reset to disable the block

Leon Alrae (8):
  hw/mips: implement ITC Configuration Tags and Storage Cells
  hw/mips: implement ITC Storage - Control View
  hw/mips: implement ITC Storage - Empty/Full Sync and Try Views
  hw/mips: implement ITC Storage - P/V Sync and Try Views
  hw/mips: implement ITC Storage - Bypass View
  target-mips: check CP0 enabled for CACHE instruction also in R6
  target-mips: make ITC Configuration Tags accessible to the CPU
  hw/mips/cps: enable ITU for multithreading processors

 default-configs/mips-softmmu-common.mak |   1 +
 hw/mips/cps.c                           |  32 ++
 hw/misc/Makefile.objs                   |   1 +
 hw/misc/mips_itu.c                      | 525 ++++++++++++++++++++++++++++++++
 include/hw/mips/cps.h                   |   2 +
 include/hw/misc/mips_itu.h              |  72 +++++
 target-mips/cpu.h                       |   8 +-
 target-mips/helper.h                    |   3 +
 target-mips/op_helper.c                 |  40 ++-
 target-mips/translate.c                 |  63 +++-
 10 files changed, 735 insertions(+), 12 deletions(-)
 create mode 100644 hw/misc/mips_itu.c
 create mode 100644 include/hw/misc/mips_itu.h

-- 
2.7.4