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[Qemu-devel] [PATCH v18 05/29] !fixup target/rx: CPU definition
From: |
Philippe Mathieu-Daudé |
Subject: |
[Qemu-devel] [PATCH v18 05/29] !fixup target/rx: CPU definition |
Date: |
Fri, 7 Jun 2019 17:37:01 +0200 |
New qom-cpu style requested by Igor.
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
---
target/rx/cpu.c | 19 +++++++++++++++----
1 file changed, 15 insertions(+), 4 deletions(-)
diff --git a/target/rx/cpu.c b/target/rx/cpu.c
index 3c43467534..c370f65faa 100644
--- a/target/rx/cpu.c
+++ b/target/rx/cpu.c
@@ -80,7 +80,7 @@ static void rx_cpu_list_entry(gpointer data, gpointer
user_data)
void rx_cpu_list(void)
{
GSList *list;
- list = object_class_get_list_sorted(TYPE_RXCPU, false);
+ list = object_class_get_list_sorted(TYPE_RX_CPU, false);
g_slist_foreach(list, rx_cpu_list_entry, NULL);
g_slist_free(list);
}
@@ -88,15 +88,26 @@ void rx_cpu_list(void)
static ObjectClass *rx_cpu_class_by_name(const char *cpu_model)
{
ObjectClass *oc;
- char *typename = NULL;
+ char *typename;
- typename = g_strdup_printf(RX_CPU_TYPE_NAME(""));
+ oc = object_class_by_name(cpu_model);
+ if (oc != NULL && object_class_dynamic_cast(oc, TYPE_RX_CPU) != NULL &&
+ !object_class_is_abstract(oc)) {
+ return oc;
+ }
+
+ typename = g_strdup_printf(RX_CPU_TYPE_NAME("%s"), cpu_model);
oc = object_class_by_name(typename);
if (oc != NULL && object_class_is_abstract(oc)) {
oc = NULL;
}
-
g_free(typename);
+
+ if (!oc) {
+ /* default to rx62n */
+ oc = object_class_by_name(RX_CPU_TYPE_NAME("rx62n"));
+ }
+
return oc;
}
--
2.20.1
- [Qemu-devel] [PATCH v18 15/29] target/rx: Add RX to SysEmuTarget, (continued)
- [Qemu-devel] [PATCH v18 15/29] target/rx: Add RX to SysEmuTarget, Philippe Mathieu-Daudé, 2019/06/07
- [Qemu-devel] [PATCH v18 19/29] MAINTAINERS: Add RX, Philippe Mathieu-Daudé, 2019/06/07
- [Qemu-devel] [PATCH v18 17/29] hw/rx: Honor -accel qtest, Philippe Mathieu-Daudé, 2019/06/07
- [Qemu-devel] [PATCH v18 16/29] tests: Add rx to machine-none-test.c, Philippe Mathieu-Daudé, 2019/06/07
- [Qemu-devel] [PATCH v18 14/29] target/rx: Convert to CPUClass::tlb_fill, Philippe Mathieu-Daudé, 2019/06/07
- [Qemu-devel] [PATCH v18 12/29] qemu/bitops.h: Add extract8 and extract16, Philippe Mathieu-Daudé, 2019/06/07
- [Qemu-devel] [PATCH v18 13/29] hw/registerfields.h: Add 8bit and 16bit register macros, Philippe Mathieu-Daudé, 2019/06/07
- [Qemu-devel] [PATCH v18 05/29] !fixup target/rx: CPU definition,
Philippe Mathieu-Daudé <=
- [Qemu-devel] [PATCH v18 09/29] hw/char: RX62N serial communication interface (SCI), Philippe Mathieu-Daudé, 2019/06/07
- [Qemu-devel] [PATCH v18 07/29] hw/intc: RX62N interrupt controller (ICUa), Philippe Mathieu-Daudé, 2019/06/07
- [Qemu-devel] [PATCH v18 02/29] target/rx: TCG helper, Philippe Mathieu-Daudé, 2019/06/07
- [Qemu-devel] [PATCH v18 03/29] target/rx: CPU definition, Philippe Mathieu-Daudé, 2019/06/07
- [Qemu-devel] [PATCH v18 08/29] hw/timer: RX62N internal timer modules, Philippe Mathieu-Daudé, 2019/06/07
- [Qemu-devel] [PATCH v18 06/29] target/rx: RX disassembler, Philippe Mathieu-Daudé, 2019/06/07
- [Qemu-devel] [PATCH v18 10/29] hw/rx: RX Target hardware definition, Philippe Mathieu-Daudé, 2019/06/07
- [Qemu-devel] [PATCH v18 01/29] target/rx: TCG translation, Philippe Mathieu-Daudé, 2019/06/07
- Re: [Qemu-devel] [PATCH v18 00/29] Add RX archtecture support, no-reply, 2019/06/07