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Re: [Qemu-devel] [RISU RFC PATCH v2 04/14] risugen_x86: add module
From: |
Jan Bobek |
Subject: |
Re: [Qemu-devel] [RISU RFC PATCH v2 04/14] risugen_x86: add module |
Date: |
Thu, 11 Jul 2019 09:10:54 -0400 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.6.1 |
On 7/11/19 5:26 AM, Richard Henderson wrote:
> On 7/10/19 8:21 PM, Jan Bobek wrote:
>> Doesn't B8 (without REX.W) work for x86_64, too? It zeroes the upper
>> part of the destination, so it's effectively zero-extending, and it's
>> one byte shorter than C7 (no ModR/M byte needed).
>
> Sorry, I shouldn't have been quite so terse. What I meant is
>
> if (!$is_x86_64 || (0 <= $imm && $imm <= 0xffffffff))
>
> so that 32-bit always uses the 5-byte encoding instead of the 6-byte.
Oh, I see. I double-checked my new code and it never uses the C7 move
in 32-bit mode, but thanks for pointing it out.
-Jan
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- Re: [Qemu-devel] [RISU RFC PATCH v2 06/14] x86.risu: add MMX instructions, (continued)
Re: [Qemu-devel] [RISU RFC PATCH v2 06/14] x86.risu: add MMX instructions, Peter Maydell, 2019/07/03
[Qemu-devel] [RISU RFC PATCH v2 04/14] risugen_x86: add module, Jan Bobek, 2019/07/01
[Qemu-devel] [RISU RFC PATCH v2 07/14] x86.risu: add SSE instructions, Jan Bobek, 2019/07/01
[Qemu-devel] [RISU RFC PATCH v2 09/14] x86.risu: add SSE3 instructions, Jan Bobek, 2019/07/01
[Qemu-devel] [RISU RFC PATCH v2 08/14] x86.risu: add SSE2 instructions, Jan Bobek, 2019/07/01
[Qemu-devel] [RISU RFC PATCH v2 10/14] x86.risu: add SSSE3 instructions, Jan Bobek, 2019/07/01
[Qemu-devel] [RISU RFC PATCH v2 11/14] x86.risu: add SSE4.1 and SSE4.2 instructions, Jan Bobek, 2019/07/01
[Qemu-devel] [RISU RFC PATCH v2 13/14] x86.risu: add AVX instructions, Jan Bobek, 2019/07/01
[Qemu-devel] [RISU RFC PATCH v2 14/14] x86.risu: add AVX2 instructions, Jan Bobek, 2019/07/01