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[Qemu-devel] [PATCH 06/26] target/mips: Clean up handling of CP0 registe
From: |
Aleksandar Markovic |
Subject: |
[Qemu-devel] [PATCH 06/26] target/mips: Clean up handling of CP0 register 7 |
Date: |
Thu, 22 Aug 2019 13:35:30 +0200 |
From: Aleksandar Markovic <address@hidden>
Clean up handling of CP0 register 7.
Signed-off-by: Aleksandar Markovic <address@hidden>
---
target/mips/translate.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/target/mips/translate.c b/target/mips/translate.c
index cdcc1cc..abbb924 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -7130,7 +7130,7 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int
reg, int sel)
break;
case CP0_REGISTER_07:
switch (sel) {
- case 0:
+ case CP0_REG07__HWRENA:
check_insn(ctx, ISA_MIPS32R2);
gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_HWREna));
register_name = "HWREna";
@@ -7869,7 +7869,7 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int
reg, int sel)
break;
case CP0_REGISTER_07:
switch (sel) {
- case 0:
+ case CP0_REG07__HWRENA:
check_insn(ctx, ISA_MIPS32R2);
gen_helper_mtc0_hwrena(cpu_env, arg);
ctx->base.is_jmp = DISAS_STOP;
@@ -8619,7 +8619,7 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int
reg, int sel)
break;
case CP0_REGISTER_07:
switch (sel) {
- case 0:
+ case CP0_REG07__HWRENA:
check_insn(ctx, ISA_MIPS32R2);
gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_HWREna));
register_name = "HWREna";
@@ -9340,7 +9340,7 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int
reg, int sel)
break;
case CP0_REGISTER_07:
switch (sel) {
- case 0:
+ case CP0_REG07__HWRENA:
check_insn(ctx, ISA_MIPS32R2);
gen_helper_mtc0_hwrena(cpu_env, arg);
ctx->base.is_jmp = DISAS_STOP;
--
2.7.4
- [Qemu-devel] [PATCH 00/26] Clean up handling of configuration register CP0, Aleksandar Markovic, 2019/08/22
- [Qemu-devel] [PATCH 10/26] target/mips: Clean up handling of CP0 register 11, Aleksandar Markovic, 2019/08/22
- [Qemu-devel] [PATCH 09/26] target/mips: Clean up handling of CP0 register 10, Aleksandar Markovic, 2019/08/22
- [Qemu-devel] [PATCH 01/26] target/mips: Clean up handling of CP0 register 0, Aleksandar Markovic, 2019/08/22
- [Qemu-devel] [PATCH 07/26] target/mips: Clean up handling of CP0 register 8, Aleksandar Markovic, 2019/08/22
- [Qemu-devel] [PATCH 04/26] target/mips: Clean up handling of CP0 register 5, Aleksandar Markovic, 2019/08/22
- [Qemu-devel] [PATCH 02/26] target/mips: Clean up handling of CP0 register 1, Aleksandar Markovic, 2019/08/22
- [Qemu-devel] [PATCH 06/26] target/mips: Clean up handling of CP0 register 7,
Aleksandar Markovic <=
- [Qemu-devel] [PATCH 08/26] target/mips: Clean up handling of CP0 register 9, Aleksandar Markovic, 2019/08/22
- [Qemu-devel] [PATCH 16/26] target/mips: Clean up handling of CP0 register 19, Aleksandar Markovic, 2019/08/22
- [Qemu-devel] [PATCH 14/26] target/mips: Clean up handling of CP0 register 17, Aleksandar Markovic, 2019/08/22
- [Qemu-devel] [PATCH 13/26] target/mips: Clean up handling of CP0 register 16, Aleksandar Markovic, 2019/08/22
- [Qemu-devel] [PATCH 12/26] target/mips: Clean up handling of CP0 register 15, Aleksandar Markovic, 2019/08/22
- [Qemu-devel] [PATCH 03/26] target/mips: Clean up handling of CP0 register 2, Aleksandar Markovic, 2019/08/22
- [Qemu-devel] [PATCH 15/26] target/mips: Clean up handling of CP0 register 18, Aleksandar Markovic, 2019/08/22
- [Qemu-devel] [PATCH 11/26] target/mips: Clean up handling of CP0 register 12, Aleksandar Markovic, 2019/08/22
- [Qemu-devel] [PATCH 05/26] target/mips: Clean up handling of CP0 register 6, Aleksandar Markovic, 2019/08/22
- [Qemu-devel] [PATCH 19/26] target/mips: Clean up handling of CP0 register 24, Aleksandar Markovic, 2019/08/22