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[Qemu-devel] [PULL 5/7] s390x/tcg: Flush the TLB of all CPUs on SSKE and
From: |
Cornelia Huck |
Subject: |
[Qemu-devel] [PULL 5/7] s390x/tcg: Flush the TLB of all CPUs on SSKE and RRBE |
Date: |
Thu, 22 Aug 2019 15:58:37 +0200 |
From: David Hildenbrand <address@hidden>
Whenever we modify a storage key, we should flush the TLBs of all CPUs,
so the MMU fault handling code can properly consider the changed storage
key (to e.g., properly set the reference and change bit on the next
accesses).
These functions are barely used in modern Linux guests, so the performance
implications are neglectable for now.
This is a preparation for better reference and change bit handling for
TCG, which will require more MMU changes.
Reviewed-by: Cornelia Huck <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>
Message-Id: <address@hidden>
Acked-by: Alex Bennée <address@hidden>
Signed-off-by: Cornelia Huck <address@hidden>
---
target/s390x/mem_helper.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c
index 29d9eaa5b725..91ba2e03d95c 100644
--- a/target/s390x/mem_helper.c
+++ b/target/s390x/mem_helper.c
@@ -1815,6 +1815,11 @@ void HELPER(sske)(CPUS390XState *env, uint64_t r1,
uint64_t r2)
key = (uint8_t) r1;
skeyclass->set_skeys(ss, addr / TARGET_PAGE_SIZE, 1, &key);
+ /*
+ * As we can only flush by virtual address and not all the entries
+ * that point to a physical address we have to flush the whole TLB.
+ */
+ tlb_flush_all_cpus_synced(env_cpu(env));
}
/* reset reference bit extended */
@@ -1843,6 +1848,11 @@ uint32_t HELPER(rrbe)(CPUS390XState *env, uint64_t r2)
if (skeyclass->set_skeys(ss, r2 / TARGET_PAGE_SIZE, 1, &key)) {
return 0;
}
+ /*
+ * As we can only flush by virtual address and not all the entries
+ * that point to a physical address we have to flush the whole TLB.
+ */
+ tlb_flush_all_cpus_synced(env_cpu(env));
/*
* cc
--
2.20.1
- [Qemu-devel] [PULL 0/7] First batch of s390x changes for 4.2, Cornelia Huck, 2019/08/22
- [Qemu-devel] [PATCH for-4.1?] compat: disable edid on virtio-gpu base device, Cornelia Huck, 2019/08/22
- [Qemu-devel] [PULL 1/7] s390x/tcg: Fix VERIM with 32/64 bit elements, Cornelia Huck, 2019/08/22
- [Qemu-devel] [PULL 2/7] s390x/mmu: Trace the right value if setting/getting the storage key fails, Cornelia Huck, 2019/08/22
- [Qemu-devel] [PULL 3/7] s390x/mmu: ASC selection in s390_cpu_get_phys_page_debug(), Cornelia Huck, 2019/08/22
- [Qemu-devel] [PULL 4/7] s390x/tcg: Rework MMU selection for instruction fetches, Cornelia Huck, 2019/08/22
- [Qemu-devel] [PULL 5/7] s390x/tcg: Flush the TLB of all CPUs on SSKE and RRBE,
Cornelia Huck <=
- [Qemu-devel] [PULL 6/7] s390x/mmu: Better storage key reference and change bit handling, Cornelia Huck, 2019/08/22
- [Qemu-devel] [PULL 7/7] s390x/mmu: Factor out storage key handling, Cornelia Huck, 2019/08/22
- Re: [Qemu-devel] [PULL 0/7] First batch of s390x changes for 4.2, Peter Maydell, 2019/08/23