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Re: [PATCH for-5.0 v5 07/23] ppc/xive: Check V bit in TM_PULL_POOL_CTX
From: |
David Gibson |
Subject: |
Re: [PATCH for-5.0 v5 07/23] ppc/xive: Check V bit in TM_PULL_POOL_CTX |
Date: |
Wed, 20 Nov 2019 14:25:25 +1100 |
User-agent: |
Mutt/1.12.1 (2019-06-15) |
On Fri, Nov 15, 2019 at 05:24:20PM +0100, Cédric Le Goater wrote:
> A context should be 'valid' when pulled from the thread interrupt
> context registers.
>
> Signed-off-by: Cédric Le Goater <address@hidden>
Applied, thanks.
> ---
> hw/intc/xive.c | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/hw/intc/xive.c b/hw/intc/xive.c
> index 42e9a11ef731..511e1a936347 100644
> --- a/hw/intc/xive.c
> +++ b/hw/intc/xive.c
> @@ -377,6 +377,11 @@ static uint64_t xive_tm_pull_os_ctx(XiveTCTX *tctx,
> hwaddr offset,
>
> qw1w2 = xive_tctx_get_os_cam(tctx, &nvt_blk, &nvt_idx, &vo);
>
> + if (!vo) {
> + qemu_log_mask(LOG_GUEST_ERROR, "XIVE: pulling invalid NVT %x/%x
> !?\n",
> + nvt_blk, nvt_idx);
> + }
> +
> /* Invalidate CAM line */
> qw1w2_new = xive_set_field32(TM_QW1W2_VO, qw1w2, 0);
> xive_tctx_set_os_cam(tctx, qw1w2_new);
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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- [PATCH for-5.0 v5 03/23] ppc/pnv: Remove pnv_xive_vst_size() routine, (continued)
- [PATCH for-5.0 v5 03/23] ppc/pnv: Remove pnv_xive_vst_size() routine, Cédric Le Goater, 2019/11/15
- [PATCH for-5.0 v5 04/23] ppc/pnv: Dump the XIVE NVT table, Cédric Le Goater, 2019/11/15
- [PATCH for-5.0 v5 05/23] ppc/pnv: Quiesce some XIVE errors, Cédric Le Goater, 2019/11/15
- [PATCH for-5.0 v5 06/23] ppc/xive: Introduce OS CAM line helpers, Cédric Le Goater, 2019/11/15
- [PATCH for-5.0 v5 07/23] ppc/xive: Check V bit in TM_PULL_POOL_CTX, Cédric Le Goater, 2019/11/15
- Re: [PATCH for-5.0 v5 07/23] ppc/xive: Check V bit in TM_PULL_POOL_CTX,
David Gibson <=
- [PATCH for-5.0 v5 08/23] ppc/xive: Introduce a XivePresenter interface, Cédric Le Goater, 2019/11/15
- [PATCH for-5.0 v5 09/23] ppc/xive: Implement the XivePresenter interface, Cédric Le Goater, 2019/11/15
- [PATCH for-5.0 v5 10/23] ppc/pnv: Loop on the threads of the chip to find a matching NVT, Cédric Le Goater, 2019/11/15
- [PATCH for-5.0 v5 11/23] ppc/pnv: Introduce a pnv_xive_is_cpu_enabled() helper, Cédric Le Goater, 2019/11/15