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Re: [PATCH for-5.0 v5 06/23] ppc/xive: Introduce OS CAM line helpers
From: |
David Gibson |
Subject: |
Re: [PATCH for-5.0 v5 06/23] ppc/xive: Introduce OS CAM line helpers |
Date: |
Wed, 20 Nov 2019 14:24:52 +1100 |
User-agent: |
Mutt/1.12.1 (2019-06-15) |
On Fri, Nov 15, 2019 at 05:24:19PM +0100, Cédric Le Goater wrote:
> The OS CAM line has a special encoding exploited by the HW. Provide
> helper routines to hide the details to the TIMA command handlers. This
> also clarifies the endianness of different variables : 'qw1w2' is
> big-endian and 'cam' is native.
>
> Signed-off-by: Cédric Le Goater <address@hidden>
Applied, thanks.
> ---
> hw/intc/xive.c | 41 ++++++++++++++++++++++++++++++++++++++---
> 1 file changed, 38 insertions(+), 3 deletions(-)
>
> diff --git a/hw/intc/xive.c b/hw/intc/xive.c
> index 177663d2b43e..42e9a11ef731 100644
> --- a/hw/intc/xive.c
> +++ b/hw/intc/xive.c
> @@ -337,14 +337,49 @@ static void xive_tm_set_os_pending(XiveTCTX *tctx,
> hwaddr offset,
> xive_tctx_notify(tctx, TM_QW1_OS);
> }
>
> +static void xive_os_cam_decode(uint32_t cam, uint8_t *nvt_blk,
> + uint32_t *nvt_idx, bool *vo)
> +{
> + if (nvt_blk) {
> + *nvt_blk = xive_nvt_blk(cam);
> + }
> + if (nvt_idx) {
> + *nvt_idx = xive_nvt_idx(cam);
> + }
> + if (vo) {
> + *vo = !!(cam & TM_QW1W2_VO);
> + }
> +}
> +
> +static uint32_t xive_tctx_get_os_cam(XiveTCTX *tctx, uint8_t *nvt_blk,
> + uint32_t *nvt_idx, bool *vo)
> +{
> + uint32_t qw1w2 = xive_tctx_word2(&tctx->regs[TM_QW1_OS]);
> + uint32_t cam = be32_to_cpu(qw1w2);
> +
> + xive_os_cam_decode(cam, nvt_blk, nvt_idx, vo);
> + return qw1w2;
> +}
> +
> +static void xive_tctx_set_os_cam(XiveTCTX *tctx, uint32_t qw1w2)
> +{
> + memcpy(&tctx->regs[TM_QW1_OS + TM_WORD2], &qw1w2, 4);
> +}
> +
> static uint64_t xive_tm_pull_os_ctx(XiveTCTX *tctx, hwaddr offset,
> unsigned size)
> {
> - uint32_t qw1w2_prev = xive_tctx_word2(&tctx->regs[TM_QW1_OS]);
> uint32_t qw1w2;
> + uint32_t qw1w2_new;
> + uint8_t nvt_blk;
> + uint32_t nvt_idx;
> + bool vo;
>
> - qw1w2 = xive_set_field32(TM_QW1W2_VO, qw1w2_prev, 0);
> - memcpy(&tctx->regs[TM_QW1_OS + TM_WORD2], &qw1w2, 4);
> + qw1w2 = xive_tctx_get_os_cam(tctx, &nvt_blk, &nvt_idx, &vo);
> +
> + /* Invalidate CAM line */
> + qw1w2_new = xive_set_field32(TM_QW1W2_VO, qw1w2, 0);
> + xive_tctx_set_os_cam(tctx, qw1w2_new);
> return qw1w2;
> }
>
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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- Re: [PATCH for-5.0 v5 02/23] ppc/xive: Introduce helpers for the NVT id, (continued)
- [PATCH for-5.0 v5 03/23] ppc/pnv: Remove pnv_xive_vst_size() routine, Cédric Le Goater, 2019/11/15
- [PATCH for-5.0 v5 04/23] ppc/pnv: Dump the XIVE NVT table, Cédric Le Goater, 2019/11/15
- [PATCH for-5.0 v5 05/23] ppc/pnv: Quiesce some XIVE errors, Cédric Le Goater, 2019/11/15
- [PATCH for-5.0 v5 06/23] ppc/xive: Introduce OS CAM line helpers, Cédric Le Goater, 2019/11/15
- Re: [PATCH for-5.0 v5 06/23] ppc/xive: Introduce OS CAM line helpers,
David Gibson <=
- [PATCH for-5.0 v5 07/23] ppc/xive: Check V bit in TM_PULL_POOL_CTX, Cédric Le Goater, 2019/11/15
- [PATCH for-5.0 v5 08/23] ppc/xive: Introduce a XivePresenter interface, Cédric Le Goater, 2019/11/15
- [PATCH for-5.0 v5 09/23] ppc/xive: Implement the XivePresenter interface, Cédric Le Goater, 2019/11/15
- [PATCH for-5.0 v5 10/23] ppc/pnv: Loop on the threads of the chip to find a matching NVT, Cédric Le Goater, 2019/11/15
- [PATCH for-5.0 v5 11/23] ppc/pnv: Introduce a pnv_xive_is_cpu_enabled() helper, Cédric Le Goater, 2019/11/15