[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH v6 00/20] ppc/pnv: add XIVE support for KVM guests
From: |
Cédric Le Goater |
Subject: |
[PATCH v6 00/20] ppc/pnv: add XIVE support for KVM guests |
Date: |
Mon, 25 Nov 2019 07:58:00 +0100 |
Hello,
The QEMU PowerNV machine emulates a baremetal OpenPOWER system and
acts as an hypervisor (L0). Supporting emulation of KVM to run guests
(L1) requires a few more extensions, among which guest support for the
XIVE interrupt controller on POWER9 processor.
The following changes extend the XIVE models with the new XiveFabric
and XivePresenter interfaces to provide support for XIVE escalations
and interrupt resend. This mechanism is used by XIVE to notify the
hypervisor that a vCPU is not dispatched on a HW thread. Tested on a
QEMU PowerNV machine and a simple QEMU pseries guest doing network on
a local bridge.
The XIVE interrupt controller offers a way to increase the XIVE
resources per chip by configuring multiple XIVE blocks on a chip. This
is not currently supported by the model. However, some configurations,
such as OPAL/skiboot, use one block-per-chip configuration with some
optimizations. One of them is to override the hardwired chip ID by the
block id in the PowerBUS operations and for CAM line compares. This
patchset improves the support for this setup. Tested with 4 chips.
A series from Suraj adding guest support in the Radix MMU model of the
QEMU PowerNV machine is still required and will be send later. The
whole patchset can be found under :
https://github.com/legoater/qemu/tree/powernv-4.2
Thanks,
C.
Changes since v5:
- Included Greg's rework of the PowerNV chip core list
- Introduced a ppc_cpu_pir() helper
- Better pnv_xive_is_cpu_enabled() helper
- Extra fixes in pnv_xive_get_indirect_tctx()
- rework of the dump of the NVT table
Changes since v4:
- rebased on QEMU 4.2-rc1
- better commit logs
- moved fixes at the beginning of the patchset
- reworked pnv_xive_match_nvt() handler to loop on the all threads of
a PnvChip
Changes since v3:
- reworked the patches introducing the XiveFabric and XivePresenter
interfaces
- moved the get_block_id() handler to the XiveRouter
- new small addons related to the format of the trigger data
Changes since v2:
- introduced the XiveFabric and XivePresenter interfaces
- removed the need of a XiveRouter pointer under XiveTCTX
Changes since v1:
- minor extra fixes
- split the escalation support in different patches
- kept the XiveRouter type for XiveTCTX back pointer (will address
this in P10)
- removed pnv_xive_vst_size(). Really broken on indirect tables.
- improved the dump of the NVT table
- introduce pnv_xive_get_block_id()
Cédric Le Goater (19):
ppc/xive: Introduce a XivePresenter interface
ppc/xive: Implement the XivePresenter interface
ppc/pnv: Loop on the threads of the chip to find a matching NVT
ppc: Introduce a ppc_cpu_pir() helper
ppc/pnv: Introduce a pnv_xive_is_cpu_enabled() helper
ppc/pnv: Fix TIMA indirect access
ppc/xive: Introduce a XiveFabric interface
ppc/pnv: Implement the XiveFabric interface
ppc/spapr: Implement the XiveFabric interface
ppc/xive: Use the XiveFabric and XivePresenter interfaces
ppc/xive: Extend the TIMA operation with a XivePresenter parameter
ppc/pnv: Clarify how the TIMA is accessed on a multichip system
ppc/xive: Move the TIMA operations to the controller model
ppc/xive: Remove the get_tctx() XiveRouter handler
ppc/xive: Introduce a xive_tctx_ipb_update() helper
ppc/xive: Synthesize interrupt from the saved IPB in the NVT
ppc/pnv: Introduce a pnv_xive_block_id() helper
ppc/pnv: Extend XiveRouter with a get_block_id() handler
ppc/pnv: Dump the XIVE NVT table
Greg Kurz (1):
ppc/pnv: Instantiate cores separately
include/hw/ppc/pnv.h | 12 +-
include/hw/ppc/pnv_xive.h | 3 -
include/hw/ppc/ppc.h | 1 +
include/hw/ppc/xive.h | 67 ++++++++-
include/hw/ppc/xive_regs.h | 3 +
hw/intc/pnv_xive.c | 290 ++++++++++++++++++++++++++++--------
hw/intc/spapr_xive.c | 88 ++++++++++-
hw/intc/xive.c | 293 +++++++++++++++++++------------------
hw/ppc/pnv.c | 96 +++++++++---
hw/ppc/ppc.c | 9 +-
hw/ppc/spapr.c | 39 +++++
11 files changed, 657 insertions(+), 244 deletions(-)
--
2.21.0
- [PATCH v6 00/20] ppc/pnv: add XIVE support for KVM guests,
Cédric Le Goater <=
- [PATCH v6 02/20] ppc/xive: Implement the XivePresenter interface, Cédric Le Goater, 2019/11/25
- [PATCH v6 01/20] ppc/xive: Introduce a XivePresenter interface, Cédric Le Goater, 2019/11/25
- [PATCH v6 03/20] ppc/pnv: Instantiate cores separately, Cédric Le Goater, 2019/11/25
- [PATCH v6 04/20] ppc/pnv: Loop on the threads of the chip to find a matching NVT, Cédric Le Goater, 2019/11/25
- [PATCH v6 05/20] ppc: Introduce a ppc_cpu_pir() helper, Cédric Le Goater, 2019/11/25
- [PATCH v6 06/20] ppc/pnv: Introduce a pnv_xive_is_cpu_enabled() helper, Cédric Le Goater, 2019/11/25
- [PATCH v6 07/20] ppc/pnv: Fix TIMA indirect access, Cédric Le Goater, 2019/11/25