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From: | Richard Henderson |
Subject: | Re: [PATCH v2 03/17] target/riscv: Move the hfence instructions to the rvh decode |
Date: | Fri, 5 Jun 2020 10:52:25 -0700 |
User-agent: | Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.8.0 |
On 6/4/20 6:20 PM, Alistair Francis wrote: > Also correct the name of the VVMA instruction. > > Signed-off-by: Alistair Francis <alistair.francis@wdc.com> > --- > target/riscv/insn32.decode | 8 ++- > .../riscv/insn_trans/trans_privileged.inc.c | 38 ------------- > target/riscv/insn_trans/trans_rvh.inc.c | 57 +++++++++++++++++++ > target/riscv/translate.c | 1 + > 4 files changed, 63 insertions(+), 41 deletions(-) > create mode 100644 target/riscv/insn_trans/trans_rvh.inc.c Reviewed-by: Richard Henderson <richard.henderson@linaro.org> r~
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