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[PATCH rc1 04/15] hw/sh4: Extract timer definitions to 'hw/timer/tmu012.
From: |
Philippe Mathieu-Daudé |
Subject: |
[PATCH rc1 04/15] hw/sh4: Extract timer definitions to 'hw/timer/tmu012.h' |
Date: |
Wed, 17 Jun 2020 21:15:08 +0200 |
Extract timer definitions to 'hw/timer/tmu012.h'.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
include/hw/sh4/sh.h | 9 ---------
include/hw/timer/tmu012.h | 23 +++++++++++++++++++++++
hw/sh4/sh7750.c | 1 +
hw/timer/sh_timer.c | 2 ++
4 files changed, 26 insertions(+), 9 deletions(-)
create mode 100644 include/hw/timer/tmu012.h
diff --git a/include/hw/sh4/sh.h b/include/hw/sh4/sh.h
index fe773cb01d..93f464bf4c 100644
--- a/include/hw/sh4/sh.h
+++ b/include/hw/sh4/sh.h
@@ -27,15 +27,6 @@ typedef struct {
int sh7750_register_io_device(struct SH7750State *s,
sh7750_io_device * device);
-/* sh_timer.c */
-#define TMU012_FEAT_TOCR (1 << 0)
-#define TMU012_FEAT_3CHAN (1 << 1)
-#define TMU012_FEAT_EXTCLK (1 << 2)
-void tmu012_init(MemoryRegion *sysmem, hwaddr base,
- int feat, uint32_t freq,
- qemu_irq ch0_irq, qemu_irq ch1_irq,
- qemu_irq ch2_irq0, qemu_irq ch2_irq1);
-
/* sh_serial.c */
#define SH_SERIAL_FEAT_SCIF (1 << 0)
diff --git a/include/hw/timer/tmu012.h b/include/hw/timer/tmu012.h
new file mode 100644
index 0000000000..808ed8de1d
--- /dev/null
+++ b/include/hw/timer/tmu012.h
@@ -0,0 +1,23 @@
+/*
+ * SuperH Timer
+ *
+ * Copyright (c) 2007 Magnus Damm
+ *
+ * This code is licensed under the GPL.
+ */
+
+#ifndef HW_TIMER_TMU012_H
+#define HW_TIMER_TMU012_H
+
+#include "exec/hwaddr.h"
+
+#define TMU012_FEAT_TOCR (1 << 0)
+#define TMU012_FEAT_3CHAN (1 << 1)
+#define TMU012_FEAT_EXTCLK (1 << 2)
+
+void tmu012_init(MemoryRegion *sysmem, hwaddr base,
+ int feat, uint32_t freq,
+ qemu_irq ch0_irq, qemu_irq ch1_irq,
+ qemu_irq ch2_irq0, qemu_irq ch2_irq1);
+
+#endif
diff --git a/hw/sh4/sh7750.c b/hw/sh4/sh7750.c
index d660714443..f8ac3ec6e3 100644
--- a/hw/sh4/sh7750.c
+++ b/hw/sh4/sh7750.c
@@ -30,6 +30,7 @@
#include "sh7750_regs.h"
#include "sh7750_regnames.h"
#include "hw/sh4/sh_intc.h"
+#include "hw/timer/tmu012.h"
#include "cpu.h"
#include "exec/exec-all.h"
diff --git a/hw/timer/sh_timer.c b/hw/timer/sh_timer.c
index 13c4051808..b9cbacf5d0 100644
--- a/hw/timer/sh_timer.c
+++ b/hw/timer/sh_timer.c
@@ -9,10 +9,12 @@
*/
#include "qemu/osdep.h"
+#include "exec/memory.h"
#include "hw/hw.h"
#include "hw/irq.h"
#include "hw/sh4/sh.h"
#include "qemu/timer.h"
+#include "hw/timer/tmu012.h"
#include "hw/ptimer.h"
//#define DEBUG_TIMER
--
2.21.3
- [PATCH rc1 00/15] hw: Renesas patches (SH4 and RX), Philippe Mathieu-Daudé, 2020/06/17
- [PATCH rc1 01/15] MAINTAINERS: Cover sh_intc files in the R2D/Shix machine sections, Philippe Mathieu-Daudé, 2020/06/17
- [PATCH rc1 02/15] MAINTAINERS: Add an entry for common Renesas peripherals, Philippe Mathieu-Daudé, 2020/06/17
- [PATCH rc1 03/15] hw/sh4: Use MemoryRegion typedef, Philippe Mathieu-Daudé, 2020/06/17
- [PATCH rc1 05/15] hw/timer/sh_timer: Remove unused 'qemu/timer.h' include, Philippe Mathieu-Daudé, 2020/06/17
- [PATCH rc1 04/15] hw/sh4: Extract timer definitions to 'hw/timer/tmu012.h',
Philippe Mathieu-Daudé <=
- [PATCH rc1 06/15] hw/intc: RX62N interrupt controller (ICUa), Philippe Mathieu-Daudé, 2020/06/17
- [PATCH rc1 07/15] hw/timer: RX62N 8-Bit timer (TMR), Philippe Mathieu-Daudé, 2020/06/17
- [PATCH rc1 08/15] hw/timer: RX62N compare match timer (CMT), Philippe Mathieu-Daudé, 2020/06/17
- [PATCH rc1 09/15] hw/char: RX62N serial communication interface (SCI), Philippe Mathieu-Daudé, 2020/06/17
- [PATCH rc1 11/15] hw/rx: Honor -accel qtest, Philippe Mathieu-Daudé, 2020/06/17
- [PATCH rc1 10/15] hw/rx: RX62N microcontroller (MCU), Philippe Mathieu-Daudé, 2020/06/17
- [PATCH rc1 12/15] hw/rx: Register R5F562N7 and R5F562N8 MCUs, Philippe Mathieu-Daudé, 2020/06/17
- [PATCH rc1 13/15] hw/rx: Add RX GDB simulator, Philippe Mathieu-Daudé, 2020/06/17