[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [PATCH v7 17/42] target/arm: Restrict the values of DCZID.BS under T
From: |
Peter Maydell |
Subject: |
Re: [PATCH v7 17/42] target/arm: Restrict the values of DCZID.BS under TCG |
Date: |
Thu, 18 Jun 2020 15:07:29 +0100 |
On Wed, 3 Jun 2020 at 02:13, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> We can simplify our DC_ZVA if we recognize that the largest BS
> that we actually use in system mode is 64. Let us just assert
> that it fits within TARGET_PAGE_SIZE.
>
> For DC_GVA and STZGM, we want to be able to write whole bytes
> of tag memory, so assert that BS is >= 2 * TAG_GRANULE, or 32.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
thanks
-- PMM
- Re: [PATCH v7 10/42] target/arm: Implement the ADDG, SUBG instructions, (continued)
- [PATCH v7 16/42] target/arm: Implement the STGP instruction, Richard Henderson, 2020/06/02
- [PATCH v7 17/42] target/arm: Restrict the values of DCZID.BS under TCG, Richard Henderson, 2020/06/02
- Re: [PATCH v7 17/42] target/arm: Restrict the values of DCZID.BS under TCG,
Peter Maydell <=
- [PATCH v7 14/42] target/arm: Add helper_probe_access, Richard Henderson, 2020/06/02
- [PATCH v7 21/42] target/arm: Move regime_el to internals.h, Richard Henderson, 2020/06/02
- [PATCH v7 15/42] target/arm: Implement LDG, STG, ST2G instructions, Richard Henderson, 2020/06/02
- [PATCH v7 22/42] target/arm: Move regime_tcr to internals.h, Richard Henderson, 2020/06/02