Re: [PATCH 3/5] hw/intc/armv7m_nvic: Only show ID register values for Main Extension CPUs

[Richard Henderson]

On 9/10/20 10:38 AM, Peter Maydell wrote:
> M-profile CPUs only implement the ID registers as guest-visible if
> the CPU implements the Main Extension (all our current CPUs except
> the Cortex-M0 do).
> 
> Currently we handle this by having the Cortex-M0 leave the ID
> register values in the ARMCPU struct as zero, but this conflicts with
> our design decision to make QEMU behaviour be keyed off ID register
> fields wherever possible.
> 
> Explicitly code the ID registers in the NVIC to return 0 if the Main
> Extension is not implemented, so we can make the M0 model set the
> ARMCPU struct fields to obtain the correct behaviour without those
> values becoming guest-visible.
> 
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
>  hw/intc/armv7m_nvic.c | 42 ++++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 42 insertions(+)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~