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[PATCH 3/5] target/mips: Do not initialize MT registers if MT ASE absent
From: |
Philippe Mathieu-Daudé |
Subject: |
[PATCH 3/5] target/mips: Do not initialize MT registers if MT ASE absent |
Date: |
Fri, 4 Dec 2020 23:26:20 +0100 |
Do not initialize MT-related config registers if the MT ASE
is not present. As some functions access the 'mvp' structure,
we still zero-allocate it.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
target/mips/translate_init.c.inc | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/target/mips/translate_init.c.inc b/target/mips/translate_init.c.inc
index 5a926bc6df3..f72fee3b40a 100644
--- a/target/mips/translate_init.c.inc
+++ b/target/mips/translate_init.c.inc
@@ -993,6 +993,10 @@ static void mvp_init(CPUMIPSState *env)
{
env->mvp = g_malloc0(sizeof(CPUMIPSMVPContext));
+ if (!ase_mt_available(env)) {
+ return;
+ }
+
/* MVPConf1 implemented, TLB sharable, no gating storage support,
programmable cache partitioning implemented, number of allocatable
and shareable TLB entries, MVP has allocatable TCs, 2 VPEs
--
2.26.2
- [PATCH 0/5] mips: Sanitize Multi-Threading ASE, Philippe Mathieu-Daudé, 2020/12/04
- [PATCH 1/5] target/mips: Remove mips_def_t unused argument from mvp_init(), Philippe Mathieu-Daudé, 2020/12/04
- [PATCH 2/5] target/mips: Introduce ase_mt_available() helper, Philippe Mathieu-Daudé, 2020/12/04
- [PATCH 3/5] target/mips: Do not initialize MT registers if MT ASE absent,
Philippe Mathieu-Daudé <=
- [PATCH 5/5] hw/mips/malta: Rewrite CP0_MVPConf0 access using deposit(), Philippe Mathieu-Daudé, 2020/12/04
- [PATCH 4/5] hw/mips/malta: Do not initialize MT registers if MT ASE absent, Philippe Mathieu-Daudé, 2020/12/04
- Re: [PATCH 0/5] mips: Sanitize Multi-Threading ASE, Philippe Mathieu-Daudé, 2020/12/07