Re: [PATCH 5/5] hw/mips/malta: Rewrite CP0_MVPConf0 access using deposit()

[Richard Henderson]

On 12/4/20 4:26 PM, Philippe Mathieu-Daudé wrote:
> PTC field has 8 bits, PVPE has 4. We plan to use the
> "hw/registerfields.h" API with MIPS CPU definitions
> (target/mips/cpu.h). Meanwhile we use magic 8 and 4.
> 
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> We want to move that to mips_cpu_reset() later,
> because this is not Malta specific but cpu-specific.
> However SMP 'cpus' come from MachineState ("hw/boards.h").
> So meanwhile this is early review.
> ---
>  hw/mips/malta.c | 8 ++++++--
>  1 file changed, 6 insertions(+), 2 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~