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[PULL 24/26] target/mips: Inline cpu_mips_realize_env() in mips_cpu_real
From: |
Philippe Mathieu-Daudé |
Subject: |
[PULL 24/26] target/mips: Inline cpu_mips_realize_env() in mips_cpu_realizefn() |
Date: |
Sun, 13 Dec 2020 21:19:44 +0100 |
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20201206233949.3783184-17-f4bug@amsat.org>
---
target/mips/cpu.c | 20 ++++++++------------
1 file changed, 8 insertions(+), 12 deletions(-)
diff --git a/target/mips/cpu.c b/target/mips/cpu.c
index f2c4de7d070..aadc6f8e74d 100644
--- a/target/mips/cpu.c
+++ b/target/mips/cpu.c
@@ -104,17 +104,6 @@ static bool mips_cpu_has_work(CPUState *cs)
#include "translate_init.c.inc"
-static void cpu_mips_realize_env(CPUMIPSState *env)
-{
- env->exception_base = (int32_t)0xBFC00000;
-
-#ifndef CONFIG_USER_ONLY
- mmu_init(env, env->cpu_model);
-#endif
- fpu_init(env, env->cpu_model);
- mvp_init(env);
-}
-
/* TODO QOM'ify CPU reset and remove */
static void cpu_state_reset(CPUMIPSState *env)
{
@@ -400,6 +389,7 @@ static void mips_cpu_realizefn(DeviceState *dev, Error
**errp)
{
CPUState *cs = CPU(dev);
MIPSCPU *cpu = MIPS_CPU(dev);
+ CPUMIPSState *env = &cpu->env;
MIPSCPUClass *mcc = MIPS_CPU_GET_CLASS(dev);
Error *local_err = NULL;
@@ -423,7 +413,13 @@ static void mips_cpu_realizefn(DeviceState *dev, Error
**errp)
return;
}
- cpu_mips_realize_env(&cpu->env);
+ env->exception_base = (int32_t)0xBFC00000;
+
+#ifndef CONFIG_USER_ONLY
+ mmu_init(env, env->cpu_model);
+#endif
+ fpu_init(env, env->cpu_model);
+ mvp_init(env);
cpu_reset(cs);
qemu_init_vcpu(cs);
--
2.26.2
- [PULL 15/26] target/mips: Remove unused headers from op_helper.c, (continued)
- [PULL 15/26] target/mips: Remove unused headers from op_helper.c, Philippe Mathieu-Daudé, 2020/12/13
- [PULL 14/26] target/mips: Remove unused headers from translate.c, Philippe Mathieu-Daudé, 2020/12/13
- [PULL 16/26] target/mips: Remove mips_def_t unused argument from mvp_init(), Philippe Mathieu-Daudé, 2020/12/13
- [PULL 17/26] target/mips: Introduce ase_mt_available() helper, Philippe Mathieu-Daudé, 2020/12/13
- [PULL 18/26] target/mips: Do not initialize MT registers if MT ASE absent, Philippe Mathieu-Daudé, 2020/12/13
- [PULL 19/26] hw/mips/malta: Do not initialize MT registers if MT ASE absent, Philippe Mathieu-Daudé, 2020/12/13
- [PULL 20/26] hw/mips/malta: Rewrite CP0_MVPConf0 access using deposit(), Philippe Mathieu-Daudé, 2020/12/13
- [PULL 21/26] target/mips: Extract cpu_supports*/cpu_set* translate.c, Philippe Mathieu-Daudé, 2020/12/13
- [PULL 22/26] target/mips: Move mips_cpu_add_definition() from helper.c to cpu.c, Philippe Mathieu-Daudé, 2020/12/13
- [PULL 23/26] target/mips: Move cpu definitions, reset() and realize() to cpu.c, Philippe Mathieu-Daudé, 2020/12/13
- [PULL 24/26] target/mips: Inline cpu_mips_realize_env() in mips_cpu_realizefn(),
Philippe Mathieu-Daudé <=
- [PULL 25/26] target/mips: Remove unused headers from fpu_helper.c, Philippe Mathieu-Daudé, 2020/12/13
- [PULL 26/26] target/mips: Use FloatRoundMode enum for FCR31 modes conversion, Philippe Mathieu-Daudé, 2020/12/13
- Re: [PULL 00/26] MIPS patches for 2020-12-13, Peter Maydell, 2020/12/14