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[PULL 19/26] hw/mips/malta: Do not initialize MT registers if MT ASE abs
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From: |
Philippe Mathieu-Daudé |
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Subject: |
[PULL 19/26] hw/mips/malta: Do not initialize MT registers if MT ASE absent |
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Date: |
Sun, 13 Dec 2020 21:19:39 +0100 |
Do not initialize MT-related config register if the MT ASE
is not present.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20201204222622.2743175-5-f4bug@amsat.org>
---
hw/mips/malta.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/hw/mips/malta.c b/hw/mips/malta.c
index 4651a1055c9..f06cb90a44a 100644
--- a/hw/mips/malta.c
+++ b/hw/mips/malta.c
@@ -1135,8 +1135,10 @@ static void malta_mips_config(MIPSCPU *cpu)
CPUMIPSState *env = &cpu->env;
CPUState *cs = CPU(cpu);
- env->mvp->CP0_MVPConf0 |= ((smp_cpus - 1) << CP0MVPC0_PVPE) |
+ if (ase_mt_available(env)) {
+ env->mvp->CP0_MVPConf0 |= ((smp_cpus - 1) << CP0MVPC0_PVPE) |
((smp_cpus * cs->nr_threads - 1) << CP0MVPC0_PTC);
+ }
}
static void main_cpu_reset(void *opaque)
--
2.26.2
- [PULL 09/26] target/mips: Allow executing MSA instructions on Loongson-3A4000, (continued)
- [PULL 09/26] target/mips: Allow executing MSA instructions on Loongson-3A4000, Philippe Mathieu-Daudé, 2020/12/13
- [PULL 10/26] target/mips: Explicit Release 6 MMU types, Philippe Mathieu-Daudé, 2020/12/13
- [PULL 11/26] target/mips: Rename cpu_supports_FEAT() as cpu_type_supports_FEAT(), Philippe Mathieu-Daudé, 2020/12/13
- [PULL 12/26] target/mips: Introduce cpu_supports_isa() taking CPUMIPSState argument, Philippe Mathieu-Daudé, 2020/12/13
- [PULL 13/26] hw/mips: Move address translation helpers to target/mips/, Philippe Mathieu-Daudé, 2020/12/13
- [PULL 15/26] target/mips: Remove unused headers from op_helper.c, Philippe Mathieu-Daudé, 2020/12/13
- [PULL 14/26] target/mips: Remove unused headers from translate.c, Philippe Mathieu-Daudé, 2020/12/13
- [PULL 16/26] target/mips: Remove mips_def_t unused argument from mvp_init(), Philippe Mathieu-Daudé, 2020/12/13
- [PULL 17/26] target/mips: Introduce ase_mt_available() helper, Philippe Mathieu-Daudé, 2020/12/13
- [PULL 18/26] target/mips: Do not initialize MT registers if MT ASE absent, Philippe Mathieu-Daudé, 2020/12/13
- [PULL 19/26] hw/mips/malta: Do not initialize MT registers if MT ASE absent,
Philippe Mathieu-Daudé <=
- [PULL 20/26] hw/mips/malta: Rewrite CP0_MVPConf0 access using deposit(), Philippe Mathieu-Daudé, 2020/12/13
- [PULL 21/26] target/mips: Extract cpu_supports*/cpu_set* translate.c, Philippe Mathieu-Daudé, 2020/12/13
- [PULL 22/26] target/mips: Move mips_cpu_add_definition() from helper.c to cpu.c, Philippe Mathieu-Daudé, 2020/12/13
- [PULL 23/26] target/mips: Move cpu definitions, reset() and realize() to cpu.c, Philippe Mathieu-Daudé, 2020/12/13
- [PULL 24/26] target/mips: Inline cpu_mips_realize_env() in mips_cpu_realizefn(), Philippe Mathieu-Daudé, 2020/12/13
- [PULL 25/26] target/mips: Remove unused headers from fpu_helper.c, Philippe Mathieu-Daudé, 2020/12/13
- [PULL 26/26] target/mips: Use FloatRoundMode enum for FCR31 modes conversion, Philippe Mathieu-Daudé, 2020/12/13
- Re: [PULL 00/26] MIPS patches for 2020-12-13, Peter Maydell, 2020/12/14