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Re: [PATCH v3 2/4] target/arm: Correct store of FPSCR value via FPCXT_S


From: Richard Henderson
Subject: Re: [PATCH v3 2/4] target/arm: Correct store of FPSCR value via FPCXT_S
Date: Wed, 16 Dec 2020 15:19:11 -0600
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0

On 12/10/20 2:14 PM, Peter Maydell wrote:
> In commit 64f863baeedc8659 we implemented the v8.1M FPCXT_S register,
> but we got the write behaviour wrong. On read, this register reads
> bits [27:0] of FPSCR plus the CONTROL.SFPA bit. On write, it doesn't
> just write back those bits -- it writes a value to the whole FPSCR,
> whose upper 4 bits are zeroes.
> 
> We also incorrectly implemented the write-to-FPSCR as a simple store
> to vfp.xregs; this skips the "update the softfloat flags" part of
> the vfp_set_fpscr helper so the value would read back correctly but
> not actually take effect.
> 
> Fix both of these things by doing a complete write to the FPSCR
> using the helper function.
> 
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
>  target/arm/translate-vfp.c.inc | 12 ++++++------
>  1 file changed, 6 insertions(+), 6 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~



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