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[PULL 19/23] target/riscv: cpu_helper: Remove compile time XLEN checks
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From: |
Alistair Francis |
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Subject: |
[PULL 19/23] target/riscv: cpu_helper: Remove compile time XLEN checks |
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Date: |
Thu, 17 Dec 2020 22:01:10 -0800 |
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com>
Acked-by: Palmer Dabbelt <palmerdabbelt@google.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
Message-id:
872d2dfcd1c7c3914655d677e911b9432eb8f340.1608142916.git.alistair.francis@wdc.com
---
target/riscv/cpu_helper.c | 12 +++++++-----
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
index 7274f971a4..a2afb95fa1 100644
--- a/target/riscv/cpu_helper.c
+++ b/target/riscv/cpu_helper.c
@@ -447,11 +447,13 @@ restart:
return TRANSLATE_PMP_FAIL;
}
-#if defined(TARGET_RISCV32)
- target_ulong pte = address_space_ldl(cs->as, pte_addr, attrs, &res);
-#elif defined(TARGET_RISCV64)
- target_ulong pte = address_space_ldq(cs->as, pte_addr, attrs, &res);
-#endif
+ target_ulong pte;
+ if (riscv_cpu_is_32bit(env)) {
+ pte = address_space_ldl(cs->as, pte_addr, attrs, &res);
+ } else {
+ pte = address_space_ldq(cs->as, pte_addr, attrs, &res);
+ }
+
if (res != MEMTX_OK) {
return TRANSLATE_FAIL;
}
--
2.29.2
- [PULL 10/23] riscv: virt: Remove target macro conditionals, (continued)
- [PULL 10/23] riscv: virt: Remove target macro conditionals, Alistair Francis, 2020/12/18
- [PULL 11/23] hw/riscv: boot: Remove compile time XLEN checks, Alistair Francis, 2020/12/18
- [PULL 12/23] hw/riscv: virt: Remove compile time XLEN checks, Alistair Francis, 2020/12/18
- [PULL 14/23] hw/riscv: sifive_u: Remove compile time XLEN checks, Alistair Francis, 2020/12/18
- [PULL 15/23] target/riscv: fpu_helper: Match function defs in HELPER macros, Alistair Francis, 2020/12/18
- [PULL 13/23] hw/riscv: spike: Remove compile time XLEN checks, Alistair Francis, 2020/12/18
- [PULL 16/23] target/riscv: Add a riscv_cpu_is_32bit() helper function, Alistair Francis, 2020/12/18
- [PULL 18/23] target/riscv: cpu: Remove compile time XLEN checks, Alistair Francis, 2020/12/18
- [PULL 17/23] target/riscv: Specify the XLEN for CPUs, Alistair Francis, 2020/12/18
- [PULL 20/23] target/riscv: csr: Remove compile time XLEN checks, Alistair Francis, 2020/12/18
- [PULL 19/23] target/riscv: cpu_helper: Remove compile time XLEN checks,
Alistair Francis <=
- [PULL 21/23] target/riscv: cpu: Set XLEN independently from target, Alistair Francis, 2020/12/18
- [PULL 22/23] hw/riscv: Use the CPU to determine if 32-bit, Alistair Francis, 2020/12/18
- [PULL 23/23] riscv/opentitan: Update the OpenTitan memory layout, Alistair Francis, 2020/12/18
- Re: [PULL 00/23] riscv-to-apply queue, Peter Maydell, 2020/12/18