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[PULL 05/49] target/arm: Set ID_PFR2.SSBS to 1 for "max" 32-bit CPU
From: |
Peter Maydell |
Subject: |
[PULL 05/49] target/arm: Set ID_PFR2.SSBS to 1 for "max" 32-bit CPU |
Date: |
Fri, 5 Mar 2021 17:14:31 +0000 |
From: Rebecca Cran <rebecca@nuviainc.com>
Enable FEAT_SSBS for the "max" 32-bit CPU.
Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210216224543.16142-4-rebecca@nuviainc.com
[PMM: fix typo causing compilation failure]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/cpu.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index b8bc89e71fc..058672c9776 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -2217,6 +2217,10 @@ static void arm_max_initfn(Object *obj)
t = cpu->isar.id_pfr0;
t = FIELD_DP32(t, ID_PFR0, DIT, 1);
cpu->isar.id_pfr0 = t;
+
+ t = cpu->isar.id_pfr2;
+ t = FIELD_DP32(t, ID_PFR2, SSBS, 1);
+ cpu->isar.id_pfr2 = t;
}
#endif
}
--
2.20.1
- [PULL 00/49] target-arm queue, Peter Maydell, 2021/03/05
- [PULL 01/49] sbsa-ref: remove cortex-a53 from list of supported cpus, Peter Maydell, 2021/03/05
- [PULL 04/49] target/arm: Enable FEAT_SSBS for "max" AARCH64 CPU, Peter Maydell, 2021/03/05
- [PULL 02/49] sbsa-ref: add 'max' to list of allowed cpus, Peter Maydell, 2021/03/05
- [PULL 03/49] target/arm: Add support for FEAT_SSBS, Speculative Store Bypass Safe, Peter Maydell, 2021/03/05
- [PULL 08/49] tests/qtests: Add npcm7xx emc model test, Peter Maydell, 2021/03/05
- [PULL 12/49] virtio-mmio: improve virtio-mmio get_dev_path alog, Peter Maydell, 2021/03/05
- [PULL 05/49] target/arm: Set ID_PFR2.SSBS to 1 for "max" 32-bit CPU,
Peter Maydell <=
- [PULL 07/49] hw/arm: Add npcm7xx emc model, Peter Maydell, 2021/03/05
- [PULL 11/49] hw/i2c/npcm7xx_smbus: Simplify npcm7xx_smbus_init(), Peter Maydell, 2021/03/05
- [PULL 06/49] hw/net: Add npcm7xx emc model, Peter Maydell, 2021/03/05
- [PULL 10/49] target/arm: Speed up aarch64 TBL/TBX, Peter Maydell, 2021/03/05
- [PULL 09/49] hw/arm/xlnx-zynqmp: Remove obsolete 'has_rpu' property, Peter Maydell, 2021/03/05
- [PULL 17/49] hw/display/tc6393xb: Remove dead code for handling non-32bpp surfaces, Peter Maydell, 2021/03/05
- [PULL 18/49] hw/display/tc6393xb: Expand out macros in template header, Peter Maydell, 2021/03/05
- [PULL 13/49] target/arm: Use TCF0 and TFSRE0 for unprivileged tag checks, Peter Maydell, 2021/03/05
- [PULL 15/49] target/arm/cpu: Update coding style to make checkpatch.pl happy, Peter Maydell, 2021/03/05
- [PULL 14/49] target/arm: Restrict v8M IDAU to TCG, Peter Maydell, 2021/03/05