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[PULL 31/42] esp: implement FIFO flush command
From: |
Mark Cave-Ayland |
Subject: |
[PULL 31/42] esp: implement FIFO flush command |
Date: |
Sun, 7 Mar 2021 12:08:39 +0000 |
At this point it is now possible to properly implement the FIFO flush command
without causing guest errors.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <20210304221103.6369-32-mark.cave-ayland@ilande.co.uk>
---
hw/scsi/esp.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/hw/scsi/esp.c b/hw/scsi/esp.c
index 2dded90be6..6aae6f91c2 100644
--- a/hw/scsi/esp.c
+++ b/hw/scsi/esp.c
@@ -769,6 +769,8 @@ void esp_reg_write(ESPState *s, uint32_t saddr, uint64_t
val)
case CMD_FLUSH:
trace_esp_mem_writeb_cmd_flush(val);
/*s->ti_size = 0;*/
+ s->ti_wptr = 0;
+ s->ti_rptr = 0;
s->rregs[ESP_RINTR] = INTR_FC;
s->rregs[ESP_RSEQ] = 0;
s->rregs[ESP_RFLAGS] = 0;
--
2.20.1
- [PULL 21/42] esp: remove redundant pdma_start from ESPState, (continued)
- [PULL 21/42] esp: remove redundant pdma_start from ESPState, Mark Cave-Ayland, 2021/03/07
- [PULL 22/42] esp: move PDMA length adjustments into esp_pdma_read()/esp_pdma_write(), Mark Cave-Ayland, 2021/03/07
- [PULL 23/42] esp: use ti_wptr/ti_rptr to manage the current FIFO position for PDMA, Mark Cave-Ayland, 2021/03/07
- [PULL 24/42] esp: use in-built TC to determine PDMA transfer length, Mark Cave-Ayland, 2021/03/07
- [PULL 25/42] esp: remove CMD pdma_origin, Mark Cave-Ayland, 2021/03/07
- [PULL 26/42] esp: rename get_cmd_cb() to esp_select(), Mark Cave-Ayland, 2021/03/07
- [PULL 28/42] esp: use FIFO for PDMA transfers between initiator and device, Mark Cave-Ayland, 2021/03/07
- [PULL 27/42] esp: fix PDMA target selection, Mark Cave-Ayland, 2021/03/07
- [PULL 29/42] esp: remove pdma_origin from ESPState, Mark Cave-Ayland, 2021/03/07
- [PULL 30/42] esp: add 4 byte PDMA read and write transfers, Mark Cave-Ayland, 2021/03/07
- [PULL 31/42] esp: implement FIFO flush command,
Mark Cave-Ayland <=
- [PULL 32/42] esp: latch individual bits in ESP_RINTR register, Mark Cave-Ayland, 2021/03/07
- [PULL 33/42] esp: defer command completion interrupt on incoming data transfers, Mark Cave-Ayland, 2021/03/07
- [PULL 34/42] esp: remove old deferred command completion mechanism, Mark Cave-Ayland, 2021/03/07
- [PULL 35/42] esp: raise interrupt after every non-DMA byte transferred to the FIFO, Mark Cave-Ayland, 2021/03/07
- [PULL 36/42] esp: add maxlen parameter to get_cmd(), Mark Cave-Ayland, 2021/03/07
- [PULL 37/42] esp: transition to message out phase after SATN and stop command, Mark Cave-Ayland, 2021/03/07
- [PULL 38/42] esp: convert ti_buf from array to Fifo8, Mark Cave-Ayland, 2021/03/07
- [PULL 39/42] esp: convert cmdbuf from array to Fifo8, Mark Cave-Ayland, 2021/03/07
- [PULL 40/42] esp: add trivial implementation of the ESP_RFLAGS register, Mark Cave-Ayland, 2021/03/07
- [PULL 41/42] esp: implement non-DMA transfers in PDMA mode, Mark Cave-Ayland, 2021/03/07