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[PULL 40/42] esp: add trivial implementation of the ESP_RFLAGS register
From: |
Mark Cave-Ayland |
Subject: |
[PULL 40/42] esp: add trivial implementation of the ESP_RFLAGS register |
Date: |
Sun, 7 Mar 2021 12:08:48 +0000 |
The bottom 5 bits contain the number of bytes remaining in the FIFO which is
trivial to implement with Fifo8 (the remaining bits are unimplemented and left
as 0 for now).
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <20210304221103.6369-41-mark.cave-ayland@ilande.co.uk>
---
hw/scsi/esp.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/hw/scsi/esp.c b/hw/scsi/esp.c
index 34dc58da58..8a9b1500de 100644
--- a/hw/scsi/esp.c
+++ b/hw/scsi/esp.c
@@ -818,6 +818,10 @@ uint64_t esp_reg_read(ESPState *s, uint32_t saddr)
val = s->rregs[saddr];
}
break;
+ case ESP_RFLAGS:
+ /* Bottom 5 bits indicate number of bytes in FIFO */
+ val = fifo8_num_used(&s->fifo);
+ break;
default:
val = s->rregs[saddr];
break;
--
2.20.1
- [PULL 30/42] esp: add 4 byte PDMA read and write transfers, (continued)
- [PULL 30/42] esp: add 4 byte PDMA read and write transfers, Mark Cave-Ayland, 2021/03/07
- [PULL 31/42] esp: implement FIFO flush command, Mark Cave-Ayland, 2021/03/07
- [PULL 32/42] esp: latch individual bits in ESP_RINTR register, Mark Cave-Ayland, 2021/03/07
- [PULL 33/42] esp: defer command completion interrupt on incoming data transfers, Mark Cave-Ayland, 2021/03/07
- [PULL 34/42] esp: remove old deferred command completion mechanism, Mark Cave-Ayland, 2021/03/07
- [PULL 35/42] esp: raise interrupt after every non-DMA byte transferred to the FIFO, Mark Cave-Ayland, 2021/03/07
- [PULL 36/42] esp: add maxlen parameter to get_cmd(), Mark Cave-Ayland, 2021/03/07
- [PULL 37/42] esp: transition to message out phase after SATN and stop command, Mark Cave-Ayland, 2021/03/07
- [PULL 38/42] esp: convert ti_buf from array to Fifo8, Mark Cave-Ayland, 2021/03/07
- [PULL 39/42] esp: convert cmdbuf from array to Fifo8, Mark Cave-Ayland, 2021/03/07
- [PULL 40/42] esp: add trivial implementation of the ESP_RFLAGS register,
Mark Cave-Ayland <=
- [PULL 41/42] esp: implement non-DMA transfers in PDMA mode, Mark Cave-Ayland, 2021/03/07
- [PULL 42/42] esp: add support for unaligned accesses, Mark Cave-Ayland, 2021/03/07
- Re: [PULL 00/42] qemu-sparc queue 20210307, Peter Maydell, 2021/03/09