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[PATCH v3 21/41] target/alpha: Make alpha_cpu_tlb_fill sysemu only
From: |
Richard Henderson |
Subject: |
[PATCH v3 21/41] target/alpha: Make alpha_cpu_tlb_fill sysemu only |
Date: |
Fri, 1 Oct 2021 13:11:31 -0400 |
The fallback code in raise_sigsegv is sufficient for alpha-linux-user.
Remove the code from cpu_loop that handled EXCP_MMFAULT.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/alpha/cpu.h | 7 ++++---
linux-user/alpha/cpu_loop.c | 8 --------
target/alpha/cpu.c | 2 +-
target/alpha/helper.c | 13 +------------
4 files changed, 6 insertions(+), 24 deletions(-)
diff --git a/target/alpha/cpu.h b/target/alpha/cpu.h
index 772828cc26..ec6657a490 100644
--- a/target/alpha/cpu.h
+++ b/target/alpha/cpu.h
@@ -439,9 +439,6 @@ void alpha_translate_init(void);
#define CPU_RESOLVING_TYPE TYPE_ALPHA_CPU
void alpha_cpu_list(void);
-bool alpha_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
- MMUAccessType access_type, int mmu_idx,
- bool probe, uintptr_t retaddr);
void QEMU_NORETURN dynamic_excp(CPUAlphaState *, uintptr_t, int, int);
void QEMU_NORETURN arith_excp(CPUAlphaState *, uintptr_t, int, uint64_t);
@@ -449,12 +446,16 @@ uint64_t cpu_alpha_load_fpcr (CPUAlphaState *env);
void cpu_alpha_store_fpcr (CPUAlphaState *env, uint64_t val);
uint64_t cpu_alpha_load_gr(CPUAlphaState *env, unsigned reg);
void cpu_alpha_store_gr(CPUAlphaState *env, unsigned reg, uint64_t val);
+
#ifndef CONFIG_USER_ONLY
void alpha_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr,
vaddr addr, unsigned size,
MMUAccessType access_type,
int mmu_idx, MemTxAttrs attrs,
MemTxResult response, uintptr_t retaddr);
+bool alpha_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
+ MMUAccessType access_type, int mmu_idx,
+ bool probe, uintptr_t retaddr);
#endif
static inline void cpu_get_tb_cpu_state(CPUAlphaState *env, target_ulong *pc,
diff --git a/linux-user/alpha/cpu_loop.c b/linux-user/alpha/cpu_loop.c
index 1b00a81385..4cc8e0a55c 100644
--- a/linux-user/alpha/cpu_loop.c
+++ b/linux-user/alpha/cpu_loop.c
@@ -54,14 +54,6 @@ void cpu_loop(CPUAlphaState *env)
fprintf(stderr, "External interrupt. Exit\n");
exit(EXIT_FAILURE);
break;
- case EXCP_MMFAULT:
- info.si_signo = TARGET_SIGSEGV;
- info.si_errno = 0;
- info.si_code = (page_get_flags(env->trap_arg0) & PAGE_VALID
- ? TARGET_SEGV_ACCERR : TARGET_SEGV_MAPERR);
- info._sifields._sigfault._addr = env->trap_arg0;
- queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
- break;
case EXCP_UNALIGN:
info.si_signo = TARGET_SIGBUS;
info.si_errno = 0;
diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c
index 93e16a2ffb..52031ca981 100644
--- a/target/alpha/cpu.c
+++ b/target/alpha/cpu.c
@@ -218,9 +218,9 @@ static const struct SysemuCPUOps alpha_sysemu_ops = {
static const struct TCGCPUOps alpha_tcg_ops = {
.initialize = alpha_translate_init,
- .tlb_fill = alpha_cpu_tlb_fill,
#ifndef CONFIG_USER_ONLY
+ .tlb_fill = alpha_cpu_tlb_fill,
.cpu_exec_interrupt = alpha_cpu_exec_interrupt,
.do_interrupt = alpha_cpu_do_interrupt,
.do_transaction_failed = alpha_cpu_do_transaction_failed,
diff --git a/target/alpha/helper.c b/target/alpha/helper.c
index 81550d9e2f..266d56ea73 100644
--- a/target/alpha/helper.c
+++ b/target/alpha/helper.c
@@ -119,18 +119,7 @@ void cpu_alpha_store_gr(CPUAlphaState *env, unsigned reg,
uint64_t val)
*cpu_alpha_addr_gr(env, reg) = val;
}
-#if defined(CONFIG_USER_ONLY)
-bool alpha_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
- MMUAccessType access_type, int mmu_idx,
- bool probe, uintptr_t retaddr)
-{
- AlphaCPU *cpu = ALPHA_CPU(cs);
-
- cs->exception_index = EXCP_MMFAULT;
- cpu->env.trap_arg0 = address;
- cpu_loop_exit_restore(cs, retaddr);
-}
-#else
+#ifndef CONFIG_USER_ONLY
/* Returns the OSF/1 entMM failure indication, or -1 on success. */
static int get_physical_address(CPUAlphaState *env, target_ulong addr,
int prot_need, int mmu_idx,
--
2.25.1
- [PATCH v3 30/41] target/mips: Make mips_cpu_tlb_fill sysemu only, (continued)
- [PATCH v3 30/41] target/mips: Make mips_cpu_tlb_fill sysemu only, Richard Henderson, 2021/10/01
- [PATCH v3 31/41] target/nios2: Implement nios2_cpu_record_sigsegv, Richard Henderson, 2021/10/01
- [PATCH v3 35/41] target/riscv: Make riscv_cpu_tlb_fill sysemu only, Richard Henderson, 2021/10/01
- [PATCH v3 37/41] target/s390x: Implement s390_cpu_record_sigsegv, Richard Henderson, 2021/10/01
- [PATCH v3 39/41] target/sparc: Make sparc_cpu_tlb_fill sysemu only, Richard Henderson, 2021/10/01
- [PATCH v3 26/41] target/hppa: Make hppa_cpu_tlb_fill sysemu only, Richard Henderson, 2021/10/01
- [PATCH v3 21/41] target/alpha: Make alpha_cpu_tlb_fill sysemu only,
Richard Henderson <=
- [PATCH v3 22/41] target/arm: Use cpu_loop_exit_segv for mte tag lookup, Richard Henderson, 2021/10/01
- [PATCH v3 23/41] target/arm: Implement arm_cpu_record_sigsegv, Richard Henderson, 2021/10/01
- [PATCH v3 29/41] target/microblaze: Make mb_cpu_tlb_fill sysemu only, Richard Henderson, 2021/10/01
- [PATCH v3 33/41] target/openrisc: Make openrisc_cpu_tlb_fill sysemu only, Richard Henderson, 2021/10/01
- [PATCH v3 38/41] target/sh4: Make sh4_cpu_tlb_fill sysemu only, Richard Henderson, 2021/10/01
- [PATCH v3 36/41] target/s390x: Use probe_access_flags in s390_probe_access, Richard Henderson, 2021/10/01
- [PATCH v3 34/41] target/ppc: Implement ppc_cpu_record_sigsegv, Richard Henderson, 2021/10/01