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[PULL 10/18] aspeed/smc: Introduce a new addr_width() class handler
From: |
Cédric Le Goater |
Subject: |
[PULL 10/18] aspeed/smc: Introduce a new addr_width() class handler |
Date: |
Tue, 12 Oct 2021 09:37:20 +0200 |
The AST2400 SPI controller has a transitional HW interface and it
stores the address width currently in use in a different register than
all the other SMC controllers. It needs special handling when working
in 4B mode.
Make it clear through a class handler. This also removes another use
of the segments array.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
include/hw/ssi/aspeed_smc.h | 1 +
hw/ssi/aspeed_smc.c | 19 ++++++++++++-------
2 files changed, 13 insertions(+), 7 deletions(-)
diff --git a/include/hw/ssi/aspeed_smc.h b/include/hw/ssi/aspeed_smc.h
index a1ca0e65c405..8dc81294988e 100644
--- a/include/hw/ssi/aspeed_smc.h
+++ b/include/hw/ssi/aspeed_smc.h
@@ -111,6 +111,7 @@ struct AspeedSMCClass {
void (*reg_to_segment)(const AspeedSMCState *s, uint32_t reg,
AspeedSegments *seg);
void (*dma_ctrl)(AspeedSMCState *s, uint32_t value);
+ int (*addr_width)(const AspeedSMCState *s);
};
#endif /* ASPEED_SMC_H */
diff --git a/hw/ssi/aspeed_smc.c b/hw/ssi/aspeed_smc.c
index 8cc7ccf45591..7129341c129e 100644
--- a/hw/ssi/aspeed_smc.c
+++ b/hw/ssi/aspeed_smc.c
@@ -196,7 +196,6 @@
* controller. These can be changed when board is initialized with the
* Segment Address Registers.
*/
-static const AspeedSegments aspeed_2400_spi1_segments[];
static const AspeedSegments aspeed_2500_spi1_segments[];
static const AspeedSegments aspeed_2500_spi2_segments[];
@@ -382,15 +381,15 @@ static inline int aspeed_smc_flash_cmd(const
AspeedSMCFlash *fl)
return cmd;
}
-static inline int aspeed_smc_flash_is_4byte(const AspeedSMCFlash *fl)
+static inline int aspeed_smc_flash_addr_width(const AspeedSMCFlash *fl)
{
const AspeedSMCState *s = fl->controller;
AspeedSMCClass *asc = ASPEED_SMC_GET_CLASS(s);
- if (asc->segments == aspeed_2400_spi1_segments) {
- return s->regs[s->r_ctrl0] & CTRL_AST2400_SPI_4BYTE;
+ if (asc->addr_width) {
+ return asc->addr_width(s);
} else {
- return s->regs[s->r_ce_ctrl] & (1 << (CTRL_EXTENDED0 + fl->cs));
+ return s->regs[s->r_ce_ctrl] & (1 << (CTRL_EXTENDED0 + fl->cs)) ? 4 :
3;
}
}
@@ -450,7 +449,7 @@ static void aspeed_smc_flash_setup(AspeedSMCFlash *fl,
uint32_t addr)
{
const AspeedSMCState *s = fl->controller;
uint8_t cmd = aspeed_smc_flash_cmd(fl);
- int i = aspeed_smc_flash_is_4byte(fl) ? 4 : 3;
+ int i = aspeed_smc_flash_addr_width(fl);
/* Flash access can not exceed CS segment */
addr = aspeed_smc_check_segment_addr(fl, addr);
@@ -558,7 +557,7 @@ static bool aspeed_smc_do_snoop(AspeedSMCFlash *fl,
uint64_t data,
unsigned size)
{
AspeedSMCState *s = fl->controller;
- uint8_t addr_width = aspeed_smc_flash_is_4byte(fl) ? 4 : 3;
+ uint8_t addr_width = aspeed_smc_flash_addr_width(fl);
trace_aspeed_smc_do_snoop(fl->cs, s->snoop_index, s->snoop_dummies,
(uint8_t) data & 0xff);
@@ -1384,6 +1383,11 @@ static const AspeedSegments aspeed_2400_spi1_segments[]
= {
{ 0x30000000, 64 * MiB },
};
+static int aspeed_2400_spi1_addr_width(const AspeedSMCState *s)
+{
+ return s->regs[R_SPI_CTRL0] & CTRL_AST2400_SPI_4BYTE ? 4 : 3;
+}
+
static void aspeed_2400_spi1_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
@@ -1405,6 +1409,7 @@ static void aspeed_2400_spi1_class_init(ObjectClass
*klass, void *data)
asc->segment_to_reg = aspeed_smc_segment_to_reg;
asc->reg_to_segment = aspeed_smc_reg_to_segment;
asc->dma_ctrl = aspeed_smc_dma_ctrl;
+ asc->addr_width = aspeed_2400_spi1_addr_width;
}
static const TypeInfo aspeed_2400_spi1_info = {
--
2.31.1
- [PULL 00/18] aspeed queue, Cédric Le Goater, 2021/10/12
- [PULL 05/18] aspeed/smc: Remove the 'flash' attribute from AspeedSMCFlash, Cédric Le Goater, 2021/10/12
- [PULL 11/18] aspeed/smc: Remove unused attribute 'irqline', Cédric Le Goater, 2021/10/12
- [PULL 18/18] aspeed/smc: Dump address offset in trace events, Cédric Le Goater, 2021/10/12
- [PULL 07/18] aspeed/smc: Rename AspeedSMCFlash 'id' to 'cs', Cédric Le Goater, 2021/10/12
- [PULL 10/18] aspeed/smc: Introduce a new addr_width() class handler,
Cédric Le Goater <=
- [PULL 13/18] hw: aspeed_gpio: Fix pin I/O type declarations, Cédric Le Goater, 2021/10/12
- [PULL 16/18] hw/arm: Integrate ADC model into Aspeed SoC, Cédric Le Goater, 2021/10/12
- [PULL 09/18] aspeed/smc: Add default reset values, Cédric Le Goater, 2021/10/12
- [PULL 14/18] hw: aspeed_gpio: Fix GPIO array indexing, Cédric Le Goater, 2021/10/12
- [PULL 17/18] aspeed/wdt: Add trace events, Cédric Le Goater, 2021/10/12
- [PULL 01/18] aspeed/smc: Add watchdog Control/Status Registers, Cédric Le Goater, 2021/10/12
- [PULL 04/18] aspeed/smc: Drop AspeedSMCController structure, Cédric Le Goater, 2021/10/12
- [PULL 12/18] aspeed/i2c: QOMify AspeedI2CBus, Cédric Le Goater, 2021/10/12
- [PULL 03/18] aspeed/smc: Stop using the model name for the memory regions, Cédric Le Goater, 2021/10/12
- [PULL 06/18] aspeed/smc: Remove the 'size' attribute from AspeedSMCFlash, Cédric Le Goater, 2021/10/12