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[PULL 16/18] hw/arm: Integrate ADC model into Aspeed SoC
From: |
Cédric Le Goater |
Subject: |
[PULL 16/18] hw/arm: Integrate ADC model into Aspeed SoC |
Date: |
Tue, 12 Oct 2021 09:37:26 +0200 |
From: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Peter Delevoryas <pdel@fb.com>
Message-Id: <20211005052604.1674891-3-pdel@fb.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
include/hw/arm/aspeed_soc.h | 2 ++
hw/arm/aspeed_ast2600.c | 11 +++++++++++
hw/arm/aspeed_soc.c | 11 +++++++++++
3 files changed, 24 insertions(+)
diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h
index 87d76c92598b..8139358549df 100644
--- a/include/hw/arm/aspeed_soc.h
+++ b/include/hw/arm/aspeed_soc.h
@@ -15,6 +15,7 @@
#include "hw/cpu/a15mpcore.h"
#include "hw/intc/aspeed_vic.h"
#include "hw/misc/aspeed_scu.h"
+#include "hw/adc/aspeed_adc.h"
#include "hw/misc/aspeed_sdmc.h"
#include "hw/misc/aspeed_xdma.h"
#include "hw/timer/aspeed_timer.h"
@@ -53,6 +54,7 @@ struct AspeedSoCState {
AspeedSCUState scu;
AspeedHACEState hace;
AspeedXDMAState xdma;
+ AspeedADCState adc;
AspeedSMCState fmc;
AspeedSMCState spi[ASPEED_SPIS_NUM];
EHCISysBusState ehci[ASPEED_EHCIS_NUM];
diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c
index a70e4c48a73c..0384357a9510 100644
--- a/hw/arm/aspeed_ast2600.c
+++ b/hw/arm/aspeed_ast2600.c
@@ -148,6 +148,9 @@ static void aspeed_soc_ast2600_init(Object *obj)
snprintf(typename, sizeof(typename), "aspeed.timer-%s", socname);
object_initialize_child(obj, "timerctrl", &s->timerctrl, typename);
+ snprintf(typename, sizeof(typename), "aspeed.adc-%s", socname);
+ object_initialize_child(obj, "adc", &s->adc, typename);
+
snprintf(typename, sizeof(typename), "aspeed.i2c-%s", socname);
object_initialize_child(obj, "i2c", &s->i2c, typename);
@@ -322,6 +325,14 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev,
Error **errp)
sysbus_connect_irq(SYS_BUS_DEVICE(&s->timerctrl), i, irq);
}
+ /* ADC */
+ if (!sysbus_realize(SYS_BUS_DEVICE(&s->adc), errp)) {
+ return;
+ }
+ sysbus_mmio_map(SYS_BUS_DEVICE(&s->adc), 0, sc->memmap[ASPEED_DEV_ADC]);
+ sysbus_connect_irq(SYS_BUS_DEVICE(&s->adc), 0,
+ aspeed_soc_get_irq(s, ASPEED_DEV_ADC));
+
/* UART - attach an 8250 to the IO space as our UART */
serial_mm_init(get_system_memory(), sc->memmap[s->uart_default], 2,
aspeed_soc_get_irq(s, s->uart_default), 38400,
diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c
index 4f013dd5cd9c..7d53cf2f5133 100644
--- a/hw/arm/aspeed_soc.c
+++ b/hw/arm/aspeed_soc.c
@@ -162,6 +162,9 @@ static void aspeed_soc_init(Object *obj)
snprintf(typename, sizeof(typename), "aspeed.timer-%s", socname);
object_initialize_child(obj, "timerctrl", &s->timerctrl, typename);
+ snprintf(typename, sizeof(typename), "aspeed.adc-%s", socname);
+ object_initialize_child(obj, "adc", &s->adc, typename);
+
snprintf(typename, sizeof(typename), "aspeed.i2c-%s", socname);
object_initialize_child(obj, "i2c", &s->i2c, typename);
@@ -287,6 +290,14 @@ static void aspeed_soc_realize(DeviceState *dev, Error
**errp)
sysbus_connect_irq(SYS_BUS_DEVICE(&s->timerctrl), i, irq);
}
+ /* ADC */
+ if (!sysbus_realize(SYS_BUS_DEVICE(&s->adc), errp)) {
+ return;
+ }
+ sysbus_mmio_map(SYS_BUS_DEVICE(&s->adc), 0, sc->memmap[ASPEED_DEV_ADC]);
+ sysbus_connect_irq(SYS_BUS_DEVICE(&s->adc), 0,
+ aspeed_soc_get_irq(s, ASPEED_DEV_ADC));
+
/* UART - attach an 8250 to the IO space as our UART */
serial_mm_init(get_system_memory(), sc->memmap[s->uart_default], 2,
aspeed_soc_get_irq(s, s->uart_default), 38400,
--
2.31.1
- [PULL 00/18] aspeed queue, Cédric Le Goater, 2021/10/12
- [PULL 05/18] aspeed/smc: Remove the 'flash' attribute from AspeedSMCFlash, Cédric Le Goater, 2021/10/12
- [PULL 11/18] aspeed/smc: Remove unused attribute 'irqline', Cédric Le Goater, 2021/10/12
- [PULL 18/18] aspeed/smc: Dump address offset in trace events, Cédric Le Goater, 2021/10/12
- [PULL 07/18] aspeed/smc: Rename AspeedSMCFlash 'id' to 'cs', Cédric Le Goater, 2021/10/12
- [PULL 10/18] aspeed/smc: Introduce a new addr_width() class handler, Cédric Le Goater, 2021/10/12
- [PULL 13/18] hw: aspeed_gpio: Fix pin I/O type declarations, Cédric Le Goater, 2021/10/12
- [PULL 16/18] hw/arm: Integrate ADC model into Aspeed SoC,
Cédric Le Goater <=
- [PULL 09/18] aspeed/smc: Add default reset values, Cédric Le Goater, 2021/10/12
- [PULL 14/18] hw: aspeed_gpio: Fix GPIO array indexing, Cédric Le Goater, 2021/10/12
- [PULL 17/18] aspeed/wdt: Add trace events, Cédric Le Goater, 2021/10/12
- [PULL 01/18] aspeed/smc: Add watchdog Control/Status Registers, Cédric Le Goater, 2021/10/12
- [PULL 04/18] aspeed/smc: Drop AspeedSMCController structure, Cédric Le Goater, 2021/10/12
- [PULL 12/18] aspeed/i2c: QOMify AspeedI2CBus, Cédric Le Goater, 2021/10/12
- [PULL 03/18] aspeed/smc: Stop using the model name for the memory regions, Cédric Le Goater, 2021/10/12
- [PULL 06/18] aspeed/smc: Remove the 'size' attribute from AspeedSMCFlash, Cédric Le Goater, 2021/10/12
- [PULL 08/18] aspeed/smc: QOMify AspeedSMCFlash, Cédric Le Goater, 2021/10/12
- [PULL 15/18] hw/adc: Add basic Aspeed ADC model, Cédric Le Goater, 2021/10/12