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[PATCH v4 15/48] target/sparc: Set fault address in sparc_cpu_do_unalign
From: |
Richard Henderson |
Subject: |
[PATCH v4 15/48] target/sparc: Set fault address in sparc_cpu_do_unaligned_access |
Date: |
Tue, 12 Oct 2021 19:45:34 -0700 |
We ought to have been recording the virtual address for reporting
to the guest trap handler. Move the function to mmu_helper.c, so
that we can re-use code shared with get_physical_address_data.
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/sparc/ldst_helper.c | 13 -------------
target/sparc/mmu_helper.c | 20 ++++++++++++++++++++
2 files changed, 20 insertions(+), 13 deletions(-)
diff --git a/target/sparc/ldst_helper.c b/target/sparc/ldst_helper.c
index 2d0d180ea6..299fc386ea 100644
--- a/target/sparc/ldst_helper.c
+++ b/target/sparc/ldst_helper.c
@@ -1953,16 +1953,3 @@ void sparc_cpu_do_transaction_failed(CPUState *cs,
hwaddr physaddr,
is_asi, size, retaddr);
}
#endif
-
-#if !defined(CONFIG_USER_ONLY)
-void QEMU_NORETURN sparc_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
- MMUAccessType access_type,
- int mmu_idx,
- uintptr_t retaddr)
-{
- SPARCCPU *cpu = SPARC_CPU(cs);
- CPUSPARCState *env = &cpu->env;
-
- cpu_raise_exception_ra(env, TT_UNALIGNED, retaddr);
-}
-#endif
diff --git a/target/sparc/mmu_helper.c b/target/sparc/mmu_helper.c
index 014601e701..f2668389b0 100644
--- a/target/sparc/mmu_helper.c
+++ b/target/sparc/mmu_helper.c
@@ -922,3 +922,23 @@ hwaddr sparc_cpu_get_phys_page_debug(CPUState *cs, vaddr
addr)
}
return phys_addr;
}
+
+#ifndef CONFIG_USER_ONLY
+void QEMU_NORETURN sparc_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
+ MMUAccessType access_type,
+ int mmu_idx,
+ uintptr_t retaddr)
+{
+ SPARCCPU *cpu = SPARC_CPU(cs);
+ CPUSPARCState *env = &cpu->env;
+
+#ifdef TARGET_SPARC64
+ env->dmmu.sfsr = build_sfsr(env, mmu_idx, access_type);
+ env->dmmu.sfar = addr;
+#else
+ env->mmuregs[4] = addr;
+#endif
+
+ cpu_raise_exception_ra(env, TT_UNALIGNED, retaddr);
+}
+#endif /* !CONFIG_USER_ONLY */
--
2.25.1
- [PATCH v4 06/48] target/microblaze: Do not set MO_ALIGN for user-only, (continued)
- [PATCH v4 06/48] target/microblaze: Do not set MO_ALIGN for user-only, Richard Henderson, 2021/10/12
- [PATCH v4 11/48] linux-user/hppa: Remove POWERPC_EXCP_ALIGN handling, Richard Henderson, 2021/10/12
- [PATCH v4 12/48] target/sh4: Set fault address in superh_cpu_do_unaligned_access, Richard Henderson, 2021/10/12
- [PATCH v4 07/48] target/ppc: Move SPR_DSISR setting to powerpc_excp, Richard Henderson, 2021/10/12
- [PATCH v4 08/48] target/ppc: Set fault address in ppc_cpu_do_unaligned_access, Richard Henderson, 2021/10/12
- [PATCH v4 09/48] target/ppc: Restrict ppc_cpu_do_unaligned_access to sysemu, Richard Henderson, 2021/10/12
- [PATCH v4 10/48] target/s390x: Implement s390x_cpu_record_sigbus, Richard Henderson, 2021/10/12
- [PATCH v4 13/48] target/sparc: Remove DEBUG_UNALIGNED, Richard Henderson, 2021/10/12
- [PATCH v4 14/48] target/sparc: Split out build_sfsr, Richard Henderson, 2021/10/12
- [PATCH v4 15/48] target/sparc: Set fault address in sparc_cpu_do_unaligned_access,
Richard Henderson <=
- [PATCH v4 16/48] accel/tcg: Report unaligned atomics for user-only, Richard Henderson, 2021/10/12
- [PATCH v4 18/48] target/i386: Use MO_128 for 16 byte atomics, Richard Henderson, 2021/10/12
- [PATCH v4 17/48] target/arm: Use MO_128 for 16 byte atomics, Richard Henderson, 2021/10/12
- [PATCH v4 23/48] accel/tcg: Move cpu_atomic decls to exec/cpu_ldst.h, Richard Henderson, 2021/10/12
- [PATCH v4 24/48] target/mips: Use cpu_*_data_ra for msa load/store, Richard Henderson, 2021/10/12
- [PATCH v4 28/48] target/arm: Use cpu_*_mmu instead of helper_*_mmu, Richard Henderson, 2021/10/12
- [PATCH v4 19/48] target/ppc: Use MO_128 for 16 byte atomics, Richard Henderson, 2021/10/12
- [PATCH v4 21/48] target/hexagon: Implement cpu_mmu_index, Richard Henderson, 2021/10/12
- [PATCH v4 20/48] target/s390x: Use MO_128 for 16 byte atomics, Richard Henderson, 2021/10/12
- [PATCH v4 31/48] linux-user: Split out do_prctl and subroutines, Richard Henderson, 2021/10/12