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[PATCH v3 09/11] target/openrisc: Interrupt handling fixes
From: |
Stafford Horne |
Subject: |
[PATCH v3 09/11] target/openrisc: Interrupt handling fixes |
Date: |
Sat, 30 Jul 2022 08:01:15 +0900 |
When running SMP systems we sometimes were seeing lockups where
IPI interrupts were being raised by never handled.
This looks to be caused by 2 issues in the openrisc interrupt handling
logic.
1. After clearing an interrupt the openrisc_cpu_set_irq handler will
always clear PICSR. This is not correct as masked interrupts
should still be visible in PICSR.
2. After setting PICMR (mask register) and exposed interrupts should
cause an interrupt to be raised. This was not being done so add it.
This patch fixes both issues.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Stafford Horne <shorne@gmail.com>
---
Since v2:
- Added Reviewed-by
target/openrisc/cpu.c | 1 -
target/openrisc/sys_helper.c | 7 +++++++
2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c
index 41d1b2a24a..cb9f35f408 100644
--- a/target/openrisc/cpu.c
+++ b/target/openrisc/cpu.c
@@ -98,7 +98,6 @@ static void openrisc_cpu_set_irq(void *opaque, int irq, int
level)
cpu_interrupt(cs, CPU_INTERRUPT_HARD);
} else {
cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD);
- cpu->env.picsr = 0;
}
}
#endif
diff --git a/target/openrisc/sys_helper.c b/target/openrisc/sys_helper.c
index da88ad9e77..09b3c97d7c 100644
--- a/target/openrisc/sys_helper.c
+++ b/target/openrisc/sys_helper.c
@@ -139,6 +139,13 @@ void HELPER(mtspr)(CPUOpenRISCState *env, target_ulong
spr, target_ulong rb)
break;
case TO_SPR(9, 0): /* PICMR */
env->picmr = rb;
+ qemu_mutex_lock_iothread();
+ if (env->picsr & env->picmr) {
+ cpu_interrupt(cs, CPU_INTERRUPT_HARD);
+ } else {
+ cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD);
+ }
+ qemu_mutex_unlock_iothread();
break;
case TO_SPR(9, 2): /* PICSR */
env->picsr &= ~rb;
--
2.37.1
- [PATCH v3 01/11] hw/openrisc: Split re-usable boot time apis out to boot.c, (continued)
- [PATCH v3 01/11] hw/openrisc: Split re-usable boot time apis out to boot.c, Stafford Horne, 2022/07/29
- [PATCH v3 02/11] target/openrisc: Fix memory reading in debugger, Stafford Horne, 2022/07/29
- [PATCH v3 04/11] hw/openrisc: Add the OpenRISC virtual machine, Stafford Horne, 2022/07/29
- [PATCH v3 05/11] hw/openrisc: Add PCI bus support to virt, Stafford Horne, 2022/07/29
- [PATCH v3 06/11] hw/openrisc: Initialize timer time at startup, Stafford Horne, 2022/07/29
- [PATCH v3 03/11] goldfish_rtc: Add big-endian property, Stafford Horne, 2022/07/29
- [PATCH v3 07/11] target/openrisc: Add interrupted CPU to log, Stafford Horne, 2022/07/29
- [PATCH v3 10/11] hw/openrisc: virt: pass random seed to fdt, Stafford Horne, 2022/07/29
- [PATCH v3 09/11] target/openrisc: Interrupt handling fixes,
Stafford Horne <=
- [PATCH v3 11/11] docs/system: openrisc: Add OpenRISC documentation, Stafford Horne, 2022/07/29
- [PATCH v3 08/11] target/openrisc: Enable MTTCG, Stafford Horne, 2022/07/29