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Re: [PATCH v3 10/23] q800: reimplement mac-io region aliasing using IO m


From: Mark Cave-Ayland
Subject: Re: [PATCH v3 10/23] q800: reimplement mac-io region aliasing using IO memory region
Date: Tue, 6 Jun 2023 07:33:30 +0100
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.10.0

On 05/06/2023 13:43, Philippe Mathieu-Daudé wrote:

On 4/6/23 15:14, Mark Cave-Ayland wrote:
The current use of aliased memory regions causes us 2 problems: firstly the
output of "info qom-tree" is absolutely huge and difficult to read, and
secondly we have already reached the internal limit for memory regions as
adding any new memory region into the mac-io region causes QEMU to assert
with "phys_section_add: Assertion `map->sections_nb < TARGET_PAGE_SIZE'
failed".

Implement the mac-io region aliasing using a single IO memory region that
applies IO_SLICE_MASK representing the maximum size of the aliased region and
then forwarding the access to the existing mac-io memory region using the
address space API.

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
---
  hw/m68k/q800.c         | 100 +++++++++++++++++++++++++++++++++--------
  include/hw/m68k/q800.h |   1 +
  2 files changed, 82 insertions(+), 19 deletions(-)

Out of curiosity, is mac-io an I/O bus, rather than a MMIO device?

Well for PPC it is currently modelled as a bus, but having worked on the q800 machine which is the forerunner to the integrated PPC CUDA/PMU version my best guess now is that it is an MMIO device with partial address decoding.


ATB,

Mark.




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