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[PULL 02/60] target/riscv: Move zc* out of the experimental properties
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From: |
Alistair Francis |
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Subject: |
[PULL 02/60] target/riscv: Move zc* out of the experimental properties |
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Date: |
Wed, 14 Jun 2023 11:19:19 +1000 |
From: Weiwei Li <liweiwei@iscas.ac.cn>
Zc* extensions (version 1.0) are ratified.
Signed-off-by: Weiwei Li <liweiwei@iscas.ac.cn>
Signed-off-by: Junqiang Wang <wangjunqiang@iscas.ac.cn>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Message-Id: <20230510030040.20528-1-liweiwei@iscas.ac.cn>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
target/riscv/cpu.c | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index db0875fb43..99ed9cb80e 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -1571,6 +1571,14 @@ static Property riscv_cpu_extensions[] = {
DEFINE_PROP_BOOL("zmmul", RISCVCPU, cfg.ext_zmmul, false),
+ DEFINE_PROP_BOOL("zca", RISCVCPU, cfg.ext_zca, false),
+ DEFINE_PROP_BOOL("zcb", RISCVCPU, cfg.ext_zcb, false),
+ DEFINE_PROP_BOOL("zcd", RISCVCPU, cfg.ext_zcd, false),
+ DEFINE_PROP_BOOL("zce", RISCVCPU, cfg.ext_zce, false),
+ DEFINE_PROP_BOOL("zcf", RISCVCPU, cfg.ext_zcf, false),
+ DEFINE_PROP_BOOL("zcmp", RISCVCPU, cfg.ext_zcmp, false),
+ DEFINE_PROP_BOOL("zcmt", RISCVCPU, cfg.ext_zcmt, false),
+
/* Vendor-specific custom extensions */
DEFINE_PROP_BOOL("xtheadba", RISCVCPU, cfg.ext_xtheadba, false),
DEFINE_PROP_BOOL("xtheadbb", RISCVCPU, cfg.ext_xtheadbb, false),
@@ -1588,14 +1596,6 @@ static Property riscv_cpu_extensions[] = {
/* These are experimental so mark with 'x-' */
DEFINE_PROP_BOOL("x-zicond", RISCVCPU, cfg.ext_zicond, false),
- DEFINE_PROP_BOOL("x-zca", RISCVCPU, cfg.ext_zca, false),
- DEFINE_PROP_BOOL("x-zcb", RISCVCPU, cfg.ext_zcb, false),
- DEFINE_PROP_BOOL("x-zcd", RISCVCPU, cfg.ext_zcd, false),
- DEFINE_PROP_BOOL("x-zce", RISCVCPU, cfg.ext_zce, false),
- DEFINE_PROP_BOOL("x-zcf", RISCVCPU, cfg.ext_zcf, false),
- DEFINE_PROP_BOOL("x-zcmp", RISCVCPU, cfg.ext_zcmp, false),
- DEFINE_PROP_BOOL("x-zcmt", RISCVCPU, cfg.ext_zcmt, false),
-
/* ePMP 0.9.3 */
DEFINE_PROP_BOOL("x-epmp", RISCVCPU, cfg.epmp, false),
DEFINE_PROP_BOOL("x-smaia", RISCVCPU, cfg.ext_smaia, false),
--
2.40.1
- [PULL 00/60] riscv-to-apply queue, Alistair Francis, 2023/06/13
- [PULL 01/60] target/riscv/vector_helper.c: skip set tail when vta is zero, Alistair Francis, 2023/06/13
- [PULL 02/60] target/riscv: Move zc* out of the experimental properties,
Alistair Francis <=
- [PULL 03/60] target/riscv/cpu.c: add riscv_cpu_validate_v(), Alistair Francis, 2023/06/13
- [PULL 04/60] target/riscv/cpu.c: remove set_vext_version(), Alistair Francis, 2023/06/13
- [PULL 05/60] target/riscv/cpu.c: remove set_priv_version(), Alistair Francis, 2023/06/13
- [PULL 06/60] target/riscv: add PRIV_VERSION_LATEST, Alistair Francis, 2023/06/13
- [PULL 07/60] target/riscv: Mask the implicitly enabled extensions in isa_string based on priv version, Alistair Francis, 2023/06/13
- [PULL 08/60] target/riscv: Update check for Zca/Zcf/Zcd, Alistair Francis, 2023/06/13
- [PULL 09/60] target/riscv/cpu.c: add priv_spec validate/disable_exts helpers, Alistair Francis, 2023/06/13
- [PULL 10/60] target/riscv/cpu.c: add riscv_cpu_validate_misa_mxl(), Alistair Francis, 2023/06/13
- [PULL 11/60] target/riscv/cpu.c: validate extensions before riscv_timer_init(), Alistair Francis, 2023/06/13
- [PULL 12/60] target/riscv/cpu.c: remove cfg setup from riscv_cpu_init(), Alistair Francis, 2023/06/13