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[PATCH v3 7/8] target/tricore: Implement SYCSCALL insn
From: |
Bastian Koppelmann |
Subject: |
[PATCH v3 7/8] target/tricore: Implement SYCSCALL insn |
Date: |
Wed, 14 Jun 2023 12:00:38 +0200 |
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1452
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
---
target/tricore/translate.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/tricore/translate.c b/target/tricore/translate.c
index a4c60e8ae2..f01000efd4 100644
--- a/target/tricore/translate.c
+++ b/target/tricore/translate.c
@@ -5236,7 +5236,7 @@ static void decode_rc_serviceroutine(DisasContext *ctx)
gen_helper_1arg(bisr, const9);
break;
case OPC2_32_RC_SYSCALL:
- /* TODO: Add exception generation */
+ generate_trap(ctx, TRAPC_SYSCALL, const9 & 0xff);
break;
default:
generate_trap(ctx, TRAPC_INSN_ERR, TIN2_IOPC);
--
2.40.1
- [PATCH v3 0/8] TriCore 1.6.2 Instructions, Bastian Koppelmann, 2023/06/14
- [PATCH v3 1/8] target/tricore: Introduce ISA 1.6.2 feature, Bastian Koppelmann, 2023/06/14
- [PATCH v3 2/8] target/tricore: Add popcnt.w insn, Bastian Koppelmann, 2023/06/14
- [PATCH v3 3/8] target/tricore: Add LHA insn, Bastian Koppelmann, 2023/06/14
- [PATCH v3 4/8] target/tricore: Add crc32l.w insn, Bastian Koppelmann, 2023/06/14
- [PATCH v3 5/8] target/tricore: Add crc32.b insn, Bastian Koppelmann, 2023/06/14
- [PATCH v3 6/8] target/tricore: Add shuffle insn, Bastian Koppelmann, 2023/06/14
- [PATCH v3 7/8] target/tricore: Implement SYCSCALL insn,
Bastian Koppelmann <=
- [PATCH v3 8/8] target/tricore: Add DISABLE insn variant, Bastian Koppelmann, 2023/06/14