qemu-devel
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

[PATCH v1 05/46] target/loongarch: Implement xvreplgr2vr


From: Song Gao
Subject: [PATCH v1 05/46] target/loongarch: Implement xvreplgr2vr
Date: Tue, 20 Jun 2023 17:37:33 +0800

This patch includes:
- XVREPLGR2VR.{B/H/W/D}.

Signed-off-by: Song Gao <gaosong@loongson.cn>
---
 target/loongarch/disas.c                     | 10 ++++++++++
 target/loongarch/insn_trans/trans_lasx.c.inc | 16 ++++++++++++++++
 target/loongarch/insns.decode                |  8 ++++++++
 3 files changed, 34 insertions(+)

diff --git a/target/loongarch/disas.c b/target/loongarch/disas.c
index 696f78c491..78e1fd19ac 100644
--- a/target/loongarch/disas.c
+++ b/target/loongarch/disas.c
@@ -1708,6 +1708,11 @@ static void output_xxx(DisasContext *ctx, arg_xxx * a, 
const char *mnemonic)
     output(ctx, mnemonic, "x%d, x%d, x%d", a->xd, a->xj, a->xk);
 }
 
+static void output_xr(DisasContext *ctx, arg_xr *a, const char *mnemonic)
+{
+    output(ctx, mnemonic, "x%d, r%d", a->xd, a->rj);
+}
+
 INSN_LASX(xvadd_b,           xxx)
 INSN_LASX(xvadd_h,           xxx)
 INSN_LASX(xvadd_w,           xxx)
@@ -1718,3 +1723,8 @@ INSN_LASX(xvsub_h,           xxx)
 INSN_LASX(xvsub_w,           xxx)
 INSN_LASX(xvsub_d,           xxx)
 INSN_LASX(xvsub_q,           xxx)
+
+INSN_LASX(xvreplgr2vr_b,     xr)
+INSN_LASX(xvreplgr2vr_h,     xr)
+INSN_LASX(xvreplgr2vr_w,     xr)
+INSN_LASX(xvreplgr2vr_d,     xr)
diff --git a/target/loongarch/insn_trans/trans_lasx.c.inc 
b/target/loongarch/insn_trans/trans_lasx.c.inc
index c918522f96..d394a4f40a 100644
--- a/target/loongarch/insn_trans/trans_lasx.c.inc
+++ b/target/loongarch/insn_trans/trans_lasx.c.inc
@@ -73,3 +73,19 @@ TRANS(xvsub_b, gvec_xxx, MO_8, tcg_gen_gvec_sub)
 TRANS(xvsub_h, gvec_xxx, MO_16, tcg_gen_gvec_sub)
 TRANS(xvsub_w, gvec_xxx, MO_32, tcg_gen_gvec_sub)
 TRANS(xvsub_d, gvec_xxx, MO_64, tcg_gen_gvec_sub)
+
+static bool gvec_dupx(DisasContext *ctx, arg_xr *a, MemOp mop)
+{
+    TCGv src = gpr_src(ctx, a->rj, EXT_NONE);
+
+    CHECK_ASXE;
+
+    tcg_gen_gvec_dup_i64(mop, vec_full_offset(a->xd),
+                         32, ctx->vl / 8, src);
+    return true;
+}
+
+TRANS(xvreplgr2vr_b, gvec_dupx, MO_8)
+TRANS(xvreplgr2vr_h, gvec_dupx, MO_16)
+TRANS(xvreplgr2vr_w, gvec_dupx, MO_32)
+TRANS(xvreplgr2vr_d, gvec_dupx, MO_64)
diff --git a/target/loongarch/insns.decode b/target/loongarch/insns.decode
index bac1903975..2eab7f6a98 100644
--- a/target/loongarch/insns.decode
+++ b/target/loongarch/insns.decode
@@ -1302,12 +1302,15 @@ vstelm_b         0011 000110 .... ........ ..... .....  
  @vr_i8i4
 #
 
 &xxx          xd xj xk
+&xr           xd rj
+
 
 #
 # LASX Formats
 #
 
 @xxx                .... ........ ..... xk:5 xj:5 xd:5    &xxx
+@xr                .... ........ ..... ..... rj:5 xd:5    &xr
 
 xvadd_b          0111 01000000 10100 ..... ..... .....    @xxx
 xvadd_h          0111 01000000 10101 ..... ..... .....    @xxx
@@ -1319,3 +1322,8 @@ xvsub_h          0111 01000000 11001 ..... ..... .....    
@xxx
 xvsub_w          0111 01000000 11010 ..... ..... .....    @xxx
 xvsub_d          0111 01000000 11011 ..... ..... .....    @xxx
 xvsub_q          0111 01010010 11011 ..... ..... .....    @xxx
+
+xvreplgr2vr_b    0111 01101001 11110 00000 ..... .....    @xr
+xvreplgr2vr_h    0111 01101001 11110 00001 ..... .....    @xr
+xvreplgr2vr_w    0111 01101001 11110 00010 ..... .....    @xr
+xvreplgr2vr_d    0111 01101001 11110 00011 ..... .....    @xr
-- 
2.39.1




reply via email to

[Prev in Thread] Current Thread [Next in Thread]