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[PULL 05/18] hw/riscv: Validate cluster and NUMA node boundary
From: |
Paolo Bonzini |
Subject: |
[PULL 05/18] hw/riscv: Validate cluster and NUMA node boundary |
Date: |
Mon, 26 Jun 2023 13:14:32 +0200 |
From: Gavin Shan <gshan@redhat.com>
There are two RISCV machines where NUMA is aware: 'virt' and 'spike'.
Both of them are required to follow cluster-NUMA-node boundary. To
enable the validation to warn about the irregular configuration where
multiple CPUs in one cluster has been associated with multiple NUMA
nodes.
Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Acked-by: Igor Mammedov <imammedo@redhat.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20230509002739.18388-4-gshan@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/riscv/spike.c | 2 ++
hw/riscv/virt.c | 2 ++
2 files changed, 4 insertions(+)
diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c
index 2c5546560aa..81f7e53aedd 100644
--- a/hw/riscv/spike.c
+++ b/hw/riscv/spike.c
@@ -354,6 +354,8 @@ static void spike_machine_class_init(ObjectClass *oc, void
*data)
mc->cpu_index_to_instance_props = riscv_numa_cpu_index_to_props;
mc->get_default_cpu_node_id = riscv_numa_get_default_cpu_node_id;
mc->numa_mem_supported = true;
+ /* platform instead of architectural choice */
+ mc->cpu_cluster_has_numa_boundary = true;
mc->default_ram_id = "riscv.spike.ram";
object_class_property_add_str(oc, "signature", NULL, spike_set_signature);
object_class_property_set_description(oc, "signature",
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index 95708d890e0..ed4c27487e4 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -1669,6 +1669,8 @@ static void virt_machine_class_init(ObjectClass *oc, void
*data)
mc->cpu_index_to_instance_props = riscv_numa_cpu_index_to_props;
mc->get_default_cpu_node_id = riscv_numa_get_default_cpu_node_id;
mc->numa_mem_supported = true;
+ /* platform instead of architectural choice */
+ mc->cpu_cluster_has_numa_boundary = true;
mc->default_ram_id = "riscv_virt_board.ram";
assert(!mc->get_hotplug_handler);
mc->get_hotplug_handler = virt_machine_get_hotplug_handler;
--
2.41.0
- [PULL 00/18] Misc, i386 patches for 2023-06-26, Paolo Bonzini, 2023/06/26
- [PULL 03/18] numa: Validate cluster and NUMA node boundary if required, Paolo Bonzini, 2023/06/26
- [PULL 04/18] hw/arm: Validate cluster and NUMA node boundary, Paolo Bonzini, 2023/06/26
- [PULL 01/18] build: further refine build.ninja rules, Paolo Bonzini, 2023/06/26
- [PULL 02/18] hw/remote/proxy: Remove dubious 'event_notifier-posix.c' include, Paolo Bonzini, 2023/06/26
- [PULL 06/18] kvm: reuse per-vcpu stats fd to avoid vcpu interruption, Paolo Bonzini, 2023/06/26
- [PULL 05/18] hw/riscv: Validate cluster and NUMA node boundary,
Paolo Bonzini <=
- [PULL 07/18] target/i386: fix INVD vmexit, Paolo Bonzini, 2023/06/26
- [PULL 08/18] target/i386: TCG supports 3DNow! prefetch(w), Paolo Bonzini, 2023/06/26
- [PULL 09/18] target/i386: TCG supports RDSEED, Paolo Bonzini, 2023/06/26
- [PULL 10/18] target/i386: do not accept RDSEED if CPUID bit absent, Paolo Bonzini, 2023/06/26
- [PULL 11/18] target/i386: TCG supports XSAVEERPTR, Paolo Bonzini, 2023/06/26
- [PULL 13/18] target/i386: Intel only supports SYSCALL/SYSRET in long mode, Paolo Bonzini, 2023/06/26
- [PULL 12/18] target/i386: TCG supports WBNOINVD, Paolo Bonzini, 2023/06/26
- [PULL 16/18] target/i386: implement RDPID in TCG, Paolo Bonzini, 2023/06/26
- [PULL 14/18] target/i386: AMD only supports SYSENTER/SYSEXIT in 32-bit mode, Paolo Bonzini, 2023/06/26
- [PULL 15/18] target/i386: sysret and sysexit are privileged, Paolo Bonzini, 2023/06/26