[PATCH qemu v4 0/2] target/arm: Improve user-mode compatibility with JITs

[~jhogberg]

Changes since v3:

1) Reworded the first commit comment to note that the need to clear
   cache is implementation-dependent.
2) CTR_EL0.DIC is now cleared in user mode to indicate that IC IVAU
   must be used.
3) The test case now only uses DC CVAU / IC IVAU when this is
   required, as indicated by CTR_EL0.{DIC,IDC}. There have been no
   changes outside of the function `mark_code_modified`

----

When running in user-mode QEMU currently fails to emulate JITs that
use dual-mapped code to get around W^X restrictions, where one mapping
is writable and one is executable. As it has no way of knowing that a
write to the writable region is reflected in the executable one, it
fails to invalidate previously translated code which leads to a crash
at best.

(Note that system mode is unaffected as the softmmu is fully aware of
what is going on.)

This patch series catches changes to dual-mapped code by honoring the
cache management instructions required to make things work on actual
hardware.

See https://gitlab.com/qemu-project/qemu/-/issues/1034 for more
background information

John Högberg (2):
  target/arm: Handle IC IVAU to improve compatibility with JITs
  tests/tcg/aarch64: Add testcases for IC IVAU and dual-mapped code

 target/arm/cpu.c                  |  13 ++
 target/arm/helper.c               |  47 +++++++-
 tests/tcg/aarch64/Makefile.target |   3 +-
 tests/tcg/aarch64/icivau.c        | 189 ++++++++++++++++++++++++++++++
 4 files changed, 248 insertions(+), 4 deletions(-)
 create mode 100644 tests/tcg/aarch64/icivau.c

-- 
2.38.5