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[PATCH v2 22/46] target/loongarch: Implement xvmskltz/xvmskgez/xvmsknz
From: |
Song Gao |
Subject: |
[PATCH v2 22/46] target/loongarch: Implement xvmskltz/xvmskgez/xvmsknz |
Date: |
Fri, 30 Jun 2023 15:58:40 +0800 |
This patch includes:
- XVMSKLTZ.{B/H/W/D};
- XVMSKGEZ.B;
- XVMSKNZ.B.
Signed-off-by: Song Gao <gaosong@loongson.cn>
---
target/loongarch/disas.c | 7 ++
target/loongarch/helper.h | 12 +-
target/loongarch/insn_trans/trans_lasx.c.inc | 7 ++
target/loongarch/insns.decode | 7 ++
target/loongarch/vec_helper.c | 115 +++++++++++++------
5 files changed, 106 insertions(+), 42 deletions(-)
diff --git a/target/loongarch/disas.c b/target/loongarch/disas.c
index 85e0cb7c8d..1a11153343 100644
--- a/target/loongarch/disas.c
+++ b/target/loongarch/disas.c
@@ -2010,6 +2010,13 @@ INSN_LASX(vext2xv_wu_hu, vv)
INSN_LASX(vext2xv_du_hu, vv)
INSN_LASX(vext2xv_du_wu, vv)
+INSN_LASX(xvmskltz_b, vv)
+INSN_LASX(xvmskltz_h, vv)
+INSN_LASX(xvmskltz_w, vv)
+INSN_LASX(xvmskltz_d, vv)
+INSN_LASX(xvmskgez_b, vv)
+INSN_LASX(xvmsknz_b, vv)
+
INSN_LASX(xvsigncov_b, vvv)
INSN_LASX(xvsigncov_h, vvv)
INSN_LASX(xvsigncov_w, vvv)
diff --git a/target/loongarch/helper.h b/target/loongarch/helper.h
index 81d0f06cc0..33bf60e82d 100644
--- a/target/loongarch/helper.h
+++ b/target/loongarch/helper.h
@@ -357,12 +357,12 @@ DEF_HELPER_FLAGS_4(vsigncov_h, TCG_CALL_NO_RWG, void,
ptr, ptr, ptr, i32)
DEF_HELPER_FLAGS_4(vsigncov_w, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
DEF_HELPER_FLAGS_4(vsigncov_d, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
-DEF_HELPER_3(vmskltz_b, void, env, i32, i32)
-DEF_HELPER_3(vmskltz_h, void, env, i32, i32)
-DEF_HELPER_3(vmskltz_w, void, env, i32, i32)
-DEF_HELPER_3(vmskltz_d, void, env, i32, i32)
-DEF_HELPER_3(vmskgez_b, void, env, i32, i32)
-DEF_HELPER_3(vmsknz_b, void, env, i32,i32)
+DEF_HELPER_4(vmskltz_b, void, env, i32, i32, i32)
+DEF_HELPER_4(vmskltz_h, void, env, i32, i32, i32)
+DEF_HELPER_4(vmskltz_w, void, env, i32, i32, i32)
+DEF_HELPER_4(vmskltz_d, void, env, i32, i32, i32)
+DEF_HELPER_4(vmskgez_b, void, env, i32, i32, i32)
+DEF_HELPER_4(vmsknz_b, void, env, i32, i32,i32)
DEF_HELPER_FLAGS_4(vnori_b, TCG_CALL_NO_RWG, void, ptr, ptr, i64, i32)
diff --git a/target/loongarch/insn_trans/trans_lasx.c.inc
b/target/loongarch/insn_trans/trans_lasx.c.inc
index 6bb6b215cf..5ac866fa87 100644
--- a/target/loongarch/insn_trans/trans_lasx.c.inc
+++ b/target/loongarch/insn_trans/trans_lasx.c.inc
@@ -397,6 +397,13 @@ TRANS(xvsigncov_h, gvec_vvv, 32, MO_16, do_vsigncov)
TRANS(xvsigncov_w, gvec_vvv, 32, MO_32, do_vsigncov)
TRANS(xvsigncov_d, gvec_vvv, 32, MO_64, do_vsigncov)
+TRANS(xvmskltz_b, gen_vv, 32, gen_helper_vmskltz_b)
+TRANS(xvmskltz_h, gen_vv, 32, gen_helper_vmskltz_h)
+TRANS(xvmskltz_w, gen_vv, 32, gen_helper_vmskltz_w)
+TRANS(xvmskltz_d, gen_vv, 32, gen_helper_vmskltz_d)
+TRANS(xvmskgez_b, gen_vv, 32, gen_helper_vmskgez_b)
+TRANS(xvmsknz_b, gen_vv, 32, gen_helper_vmsknz_b)
+
TRANS(xvreplgr2vr_b, gvec_dup, 32, MO_8)
TRANS(xvreplgr2vr_h, gvec_dup, 32, MO_16)
TRANS(xvreplgr2vr_w, gvec_dup, 32, MO_32)
diff --git a/target/loongarch/insns.decode b/target/loongarch/insns.decode
index 7bbda1a142..6a161d6d20 100644
--- a/target/loongarch/insns.decode
+++ b/target/loongarch/insns.decode
@@ -1598,6 +1598,13 @@ xvsigncov_h 0111 01010010 11101 ..... ..... .....
@vvv
xvsigncov_w 0111 01010010 11110 ..... ..... ..... @vvv
xvsigncov_d 0111 01010010 11111 ..... ..... ..... @vvv
+xvmskltz_b 0111 01101001 11000 10000 ..... ..... @vv
+xvmskltz_h 0111 01101001 11000 10001 ..... ..... @vv
+xvmskltz_w 0111 01101001 11000 10010 ..... ..... @vv
+xvmskltz_d 0111 01101001 11000 10011 ..... ..... @vv
+xvmskgez_b 0111 01101001 11000 10100 ..... ..... @vv
+xvmsknz_b 0111 01101001 11000 11000 ..... ..... @vv
+
xvreplgr2vr_b 0111 01101001 11110 00000 ..... ..... @vr
xvreplgr2vr_h 0111 01101001 11110 00001 ..... ..... @vr
xvreplgr2vr_w 0111 01101001 11110 00010 ..... ..... @vr
diff --git a/target/loongarch/vec_helper.c b/target/loongarch/vec_helper.c
index 49d114f5ac..91f089292d 100644
--- a/target/loongarch/vec_helper.c
+++ b/target/loongarch/vec_helper.c
@@ -780,16 +780,23 @@ static uint64_t do_vmskltz_b(int64_t val)
return c >> 56;
}
-void HELPER(vmskltz_b)(CPULoongArchState *env, uint32_t vd, uint32_t vj)
+void HELPER(vmskltz_b)(CPULoongArchState *env,
+ uint32_t oprsz, uint32_t vd, uint32_t vj)
{
- uint16_t temp = 0;
+ int i, max;
+ uint16_t temp;
VReg *Vd = &(env->fpr[vd].vreg);
VReg *Vj = &(env->fpr[vj].vreg);
- temp = do_vmskltz_b(Vj->D(0));
- temp |= (do_vmskltz_b(Vj->D(1)) << 8);
- Vd->D(0) = temp;
- Vd->D(1) = 0;
+ max = (oprsz == 16) ? 1 : 2;
+
+ for (i = 0; i < max; i++) {
+ temp = 0;
+ temp = do_vmskltz_b(Vj->D(2 * i));
+ temp |= (do_vmskltz_b(Vj->D(2 * i + 1)) << 8);
+ Vd->D(2 * i) = temp;
+ Vd->D(2 * i + 1) = 0;
+ }
}
static uint64_t do_vmskltz_h(int64_t val)
@@ -801,16 +808,23 @@ static uint64_t do_vmskltz_h(int64_t val)
return c >> 60;
}
-void HELPER(vmskltz_h)(CPULoongArchState *env, uint32_t vd, uint32_t vj)
+void HELPER(vmskltz_h)(CPULoongArchState *env,
+ uint32_t oprsz, uint32_t vd, uint32_t vj)
{
- uint16_t temp = 0;
+ int i, max;
+ uint16_t temp;
VReg *Vd = &(env->fpr[vd].vreg);
VReg *Vj = &(env->fpr[vj].vreg);
- temp = do_vmskltz_h(Vj->D(0));
- temp |= (do_vmskltz_h(Vj->D(1)) << 4);
- Vd->D(0) = temp;
- Vd->D(1) = 0;
+ max = (oprsz == 16) ? 1 : 2;
+
+ for (i = 0; i < max; i++) {
+ temp = 0;
+ temp = do_vmskltz_h(Vj->D(2 * i));
+ temp |= (do_vmskltz_h(Vj->D(2 * i + 1)) << 4);
+ Vd->D(2 * i) = temp;
+ Vd->D(2 * i + 1) = 0;
+ }
}
static uint64_t do_vmskltz_w(int64_t val)
@@ -821,44 +835,66 @@ static uint64_t do_vmskltz_w(int64_t val)
return c >> 62;
}
-void HELPER(vmskltz_w)(CPULoongArchState *env, uint32_t vd, uint32_t vj)
+void HELPER(vmskltz_w)(CPULoongArchState *env,
+ uint32_t oprsz, uint32_t vd, uint32_t vj)
{
- uint16_t temp = 0;
+ int i, max;
+ uint16_t temp;
VReg *Vd = &(env->fpr[vd].vreg);
VReg *Vj = &(env->fpr[vj].vreg);
- temp = do_vmskltz_w(Vj->D(0));
- temp |= (do_vmskltz_w(Vj->D(1)) << 2);
- Vd->D(0) = temp;
- Vd->D(1) = 0;
+ max = (oprsz == 16) ? 1 : 2;
+
+ for (i = 0; i < max; i++) {
+ temp = 0;
+ temp = do_vmskltz_w(Vj->D(2 * i));
+ temp |= (do_vmskltz_w(Vj->D(2 * i + 1)) << 2);
+ Vd->D(2 * i) = temp;
+ Vd->D(2 * i + 1) = 0;
+ }
}
static uint64_t do_vmskltz_d(int64_t val)
{
return (uint64_t)val >> 63;
}
-void HELPER(vmskltz_d)(CPULoongArchState *env, uint32_t vd, uint32_t vj)
+
+void HELPER(vmskltz_d)(CPULoongArchState *env,
+ uint32_t oprsz, uint32_t vd, uint32_t vj)
{
- uint16_t temp = 0;
+ int i, max;
+ uint16_t temp;
VReg *Vd = &(env->fpr[vd].vreg);
VReg *Vj = &(env->fpr[vj].vreg);
- temp = do_vmskltz_d(Vj->D(0));
- temp |= (do_vmskltz_d(Vj->D(1)) << 1);
- Vd->D(0) = temp;
- Vd->D(1) = 0;
+ max = (oprsz == 16) ? 1 : 2;
+
+ for (i = 0; i < max; i++) {
+ temp = 0;
+ temp = do_vmskltz_d(Vj->D(2 * i));
+ temp |= (do_vmskltz_d(Vj->D(2 * i + 1)) << 1);
+ Vd->D(2 * i) = temp;
+ Vd->D(2 * i + 1) = 0;
+ }
}
-void HELPER(vmskgez_b)(CPULoongArchState *env, uint32_t vd, uint32_t vj)
+void HELPER(vmskgez_b)(CPULoongArchState *env,
+ uint32_t oprsz, uint32_t vd, uint32_t vj)
{
- uint16_t temp = 0;
+ int i, max;
+ uint16_t temp;
VReg *Vd = &(env->fpr[vd].vreg);
VReg *Vj = &(env->fpr[vj].vreg);
- temp = do_vmskltz_b(Vj->D(0));
- temp |= (do_vmskltz_b(Vj->D(1)) << 8);
- Vd->D(0) = (uint16_t)(~temp);
- Vd->D(1) = 0;
+ max = (oprsz == 16) ? 1 : 2;
+
+ for (i = 0; i < max; i++) {
+ temp = 0;
+ temp = do_vmskltz_b(Vj->D(2 * i));
+ temp |= (do_vmskltz_b(Vj->D(2 * i + 1)) << 8);
+ Vd->D(2 * i) = (uint16_t)(~temp);
+ Vd->D(2 * i + 1) = 0;
+ }
}
static uint64_t do_vmskez_b(uint64_t a)
@@ -871,16 +907,23 @@ static uint64_t do_vmskez_b(uint64_t a)
return c >> 56;
}
-void HELPER(vmsknz_b)(CPULoongArchState *env, uint32_t vd, uint32_t vj)
+void HELPER(vmsknz_b)(CPULoongArchState *env,
+ uint32_t oprsz, uint32_t vd, uint32_t vj)
{
- uint16_t temp = 0;
+ int i, max;
+ uint16_t temp;
VReg *Vd = &(env->fpr[vd].vreg);
VReg *Vj = &(env->fpr[vj].vreg);
- temp = do_vmskez_b(Vj->D(0));
- temp |= (do_vmskez_b(Vj->D(1)) << 8);
- Vd->D(0) = (uint16_t)(~temp);
- Vd->D(1) = 0;
+ max = (oprsz == 16) ? 1 : 2;
+
+ for (i = 0; i < max; i++) {
+ temp = 0;
+ temp = do_vmskez_b(Vj->D(2 * i));
+ temp |= (do_vmskez_b(Vj->D(2 * i + 1)) << 8);
+ Vd->D(2 * i) = (uint16_t)(~temp);
+ Vd->D(2 * i + 1) = 0;
+ }
}
void HELPER(vnori_b)(void *vd, void *vj, uint64_t imm, uint32_t v)
--
2.39.1
- [PATCH v2 03/46] target/loongarch: Add CHECK_ASXE maccro for check LASX enable, (continued)
- [PATCH v2 03/46] target/loongarch: Add CHECK_ASXE maccro for check LASX enable, Song Gao, 2023/06/30
- [PATCH v2 04/46] target/loongarch: Implement xvadd/xvsub, Song Gao, 2023/06/30
- [PATCH v2 09/46] target/loongarch: Implement xvhaddw/xvhsubw, Song Gao, 2023/06/30
- [PATCH v2 06/46] target/loongarch: Implement xvaddi/xvsubi, Song Gao, 2023/06/30
- [PATCH v2 08/46] target/loongarch: Implement xvsadd/xvssub, Song Gao, 2023/06/30
- [PATCH v2 10/46] target/loongarch: Implement xvaddw/xvsubw, Song Gao, 2023/06/30
- [PATCH v2 15/46] target/loongarch: Implement xvmul/xvmuh/xvmulw{ev/od}, Song Gao, 2023/06/30
- [PATCH v2 16/46] target/loongarch: Implement xvmadd/xvmsub/xvmaddw{ev/od}, Song Gao, 2023/06/30
- [PATCH v2 14/46] target/loongarch: Implement xvmax/xvmin, Song Gao, 2023/06/30
- [PATCH v2 19/46] target/loongarch: Implement xvexth, Song Gao, 2023/06/30
- [PATCH v2 22/46] target/loongarch: Implement xvmskltz/xvmskgez/xvmsknz,
Song Gao <=
- [PATCH v2 20/46] target/loongarch: Implement vext2xv, Song Gao, 2023/06/30
- [PATCH v2 28/46] target/loongarch: Implement xvsrln xvsran, Song Gao, 2023/06/30
- [PATCH v2 23/46] target/loognarch: Implement xvldi, Song Gao, 2023/06/30
- [PATCH v2 26/46] target/loongarch: Implement xvsllwil xvextl, Song Gao, 2023/06/30
- [PATCH v2 34/46] target/loongarch: Implement xvbitclr xvbitset xvbitrev, Song Gao, 2023/06/30
- [PATCH v2 17/46] target/loongarch; Implement xvdiv/xvmod, Song Gao, 2023/06/30
- [PATCH v2 13/46] target/loongarch: Implement xvadda, Song Gao, 2023/06/30
- [PATCH v2 18/46] target/loongarch: Implement xvsat, Song Gao, 2023/06/30
- [PATCH v2 21/46] target/loongarch: Implement xvsigncov, Song Gao, 2023/06/30
- [PATCH v2 25/46] target/loongarch: Implement xvsll xvsrl xvsra xvrotr, Song Gao, 2023/06/30