On 6/30/23 15:20, Frederic Barrat wrote:
Direct TIMA operations can be done through 4 pages, each with a
different privilege level dictating what fields can be accessed. On
the other hand, indirect TIMA accesses on P10 are done through a
single page, which is the equivalent of the most privileged page of
direct TIMA accesses.
The offset in the IC bar of an indirect access specifies what hw
thread is targeted (page shift bits)
yes. Max is 128 threads.
and the offset in the TIMA being accessed (the page offset bits).
a part of the sentence seems to be missing ?