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Re: [PATCH 4/9] include/hw: introduce CPU_MAX_NEGATIVE_ENV_OFFSET


From: Richard Henderson
Subject: Re: [PATCH 4/9] include/hw: introduce CPU_MAX_NEGATIVE_ENV_OFFSET
Date: Fri, 30 Jun 2023 16:19:32 +0200
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.11.0

On 6/30/23 14:25, Anton Johansson wrote:
For reasons related to code-generation quality, the offset of
CPUTLBDescFast and IcountDecr from CPUArchState needs to fit within
11 bits of displacement (arm[32|64] and riscv addressing modes).

This commit introduces a new constant to store the maximum allowed
negative offset, so it can be statically asserted to hold later on.

Signed-off-by: Anton Johansson <anjo@rev.ng>
---
  include/hw/core/cpu.h | 11 +++++++++++
  1 file changed, 11 insertions(+)

diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
index c226d7263c..0377f74d48 100644
--- a/include/hw/core/cpu.h
+++ b/include/hw/core/cpu.h
@@ -259,6 +259,17 @@ struct qemu_work_item;
#define CPU_UNSET_NUMA_NODE_ID -1 +/*
+ * For reasons related to code-generation quality the fast path
+ * CPUTLBDescFast array and IcountDecr fields need to be located within a
+ * small negative offset of CPUArchState.  This requirement comes from
+ * host-specific addressing modes of arm[32|64] and riscv which uses 12-
+ * and 11 bits of displacement respectively.
+ */
+#define CPU_MIN_DISPLACEMENT_BITS 11
+#define CPU_MAX_NEGATIVE_ENV_OFFSET \
+    (-(1 << CPU_MIN_DISPLACEMENT_BITS))

You'd want 6 bits, for AArch64 LDP (7-bit signed immediate).


r~



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