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[PULL 13/39] tcg/loongarch64: Lower mul_vec to vmul
From: |
Richard Henderson |
Subject: |
[PULL 13/39] tcg/loongarch64: Lower mul_vec to vmul |
Date: |
Fri, 15 Sep 2023 20:29:45 -0700 |
From: Jiajie Chen <c@jia.je>
Signed-off-by: Jiajie Chen <c@jia.je>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230908022302.180442-9-c@jia.je>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/loongarch64/tcg-target.h | 2 +-
tcg/loongarch64/tcg-target.c.inc | 8 ++++++++
2 files changed, 9 insertions(+), 1 deletion(-)
diff --git a/tcg/loongarch64/tcg-target.h b/tcg/loongarch64/tcg-target.h
index 64c72d0857..2c2266ed31 100644
--- a/tcg/loongarch64/tcg-target.h
+++ b/tcg/loongarch64/tcg-target.h
@@ -185,7 +185,7 @@ extern bool use_lsx_instructions;
#define TCG_TARGET_HAS_nand_vec 0
#define TCG_TARGET_HAS_nor_vec 1
#define TCG_TARGET_HAS_eqv_vec 0
-#define TCG_TARGET_HAS_mul_vec 0
+#define TCG_TARGET_HAS_mul_vec 1
#define TCG_TARGET_HAS_shi_vec 0
#define TCG_TARGET_HAS_shs_vec 0
#define TCG_TARGET_HAS_shv_vec 0
diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc
index b36b706e39..0814f62905 100644
--- a/tcg/loongarch64/tcg-target.c.inc
+++ b/tcg/loongarch64/tcg-target.c.inc
@@ -1698,6 +1698,9 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc,
static const LoongArchInsn neg_vec_insn[4] = {
OPC_VNEG_B, OPC_VNEG_H, OPC_VNEG_W, OPC_VNEG_D
};
+ static const LoongArchInsn mul_vec_insn[4] = {
+ OPC_VMUL_B, OPC_VMUL_H, OPC_VMUL_W, OPC_VMUL_D
+ };
a0 = args[0];
a1 = args[1];
@@ -1799,6 +1802,9 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc,
case INDEX_op_neg_vec:
tcg_out32(s, encode_vdvj_insn(neg_vec_insn[vece], a0, a1));
break;
+ case INDEX_op_mul_vec:
+ tcg_out32(s, encode_vdvjvk_insn(mul_vec_insn[vece], a0, a1, a2));
+ break;
case INDEX_op_dupm_vec:
tcg_out_dupm_vec(s, type, vece, a0, a1, a2);
break;
@@ -1825,6 +1831,7 @@ int tcg_can_emit_vec_op(TCGOpcode opc, TCGType type,
unsigned vece)
case INDEX_op_nor_vec:
case INDEX_op_not_vec:
case INDEX_op_neg_vec:
+ case INDEX_op_mul_vec:
return 1;
default:
return 0;
@@ -1999,6 +2006,7 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpcode
op)
case INDEX_op_orc_vec:
case INDEX_op_xor_vec:
case INDEX_op_nor_vec:
+ case INDEX_op_mul_vec:
return C_O1_I2(w, w, w);
case INDEX_op_not_vec:
--
2.34.1
- [PULL 02/39] accel/tcg: Fix the comment for CPUTLBEntryFull, (continued)
- [PULL 02/39] accel/tcg: Fix the comment for CPUTLBEntryFull, Richard Henderson, 2023/09/15
- [PULL 03/39] util: Delete checks for old host definitions, Richard Henderson, 2023/09/15
- [PULL 05/39] thunk: Delete checks for old host definitions, Richard Henderson, 2023/09/15
- [PULL 04/39] softmmu: Delete checks for old host definitions, Richard Henderson, 2023/09/15
- [PULL 07/39] tcg/loongarch64: Lower basic tcg vec ops to LSX, Richard Henderson, 2023/09/15
- [PULL 08/39] tcg: pass vece to tcg_target_const_match(), Richard Henderson, 2023/09/15
- [PULL 10/39] tcg/loongarch64: Lower add/sub_vec to vadd/vsub, Richard Henderson, 2023/09/15
- [PULL 11/39] tcg/loongarch64: Lower vector bitwise operations, Richard Henderson, 2023/09/15
- [PULL 09/39] tcg/loongarch64: Lower cmp_vec to vseq/vsle/vslt, Richard Henderson, 2023/09/15
- [PULL 12/39] tcg/loongarch64: Lower neg_vec to vneg, Richard Henderson, 2023/09/15
- [PULL 13/39] tcg/loongarch64: Lower mul_vec to vmul,
Richard Henderson <=
- [PULL 15/39] tcg/loongarch64: Lower vector saturated ops, Richard Henderson, 2023/09/15
- [PULL 16/39] tcg/loongarch64: Lower vector shift vector ops, Richard Henderson, 2023/09/15
- [PULL 18/39] tcg/loongarch64: Lower vector shift integer ops, Richard Henderson, 2023/09/15
- [PULL 06/39] tcg/loongarch64: Import LSX instructions, Richard Henderson, 2023/09/15
- [PULL 14/39] tcg/loongarch64: Lower vector min max ops, Richard Henderson, 2023/09/15
- [PULL 17/39] tcg/loongarch64: Lower bitsel_vec to vbitsel, Richard Henderson, 2023/09/15
- [PULL 19/39] tcg/loongarch64: Lower rotv_vec ops to LSX, Richard Henderson, 2023/09/15
- [PULL 20/39] tcg/loongarch64: Lower rotli_vec to vrotri, Richard Henderson, 2023/09/15
- [PULL 21/39] tcg/loongarch64: Implement 128-bit load & store, Richard Henderson, 2023/09/15
- [PULL 22/39] tcg: Add gvec compare with immediate and scalar operand, Richard Henderson, 2023/09/15