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[Qemu-ppc] [PULL 064/118] PPC: Make all e500 CPUs SVR aware
From: |
Alexander Graf |
Subject: |
[Qemu-ppc] [PULL 064/118] PPC: Make all e500 CPUs SVR aware |
Date: |
Wed, 4 Jun 2014 14:44:05 +0200 |
Our pre-e500mc e500 CPU types didn't get instanciated with SVR information,
even though those systems do support the SVR register.
Spawn them with the SVR tag so that they don't get confused when someone tries
to read SPR_SVR.
Signed-off-by: Alexander Graf <address@hidden>
---
target-ppc/cpu-models.c | 28 ++++++++++++++--------------
1 file changed, 14 insertions(+), 14 deletions(-)
diff --git a/target-ppc/cpu-models.c b/target-ppc/cpu-models.c
index 57cb4e4..9a66c03 100644
--- a/target-ppc/cpu-models.c
+++ b/target-ppc/cpu-models.c
@@ -671,20 +671,20 @@
POWERPC_DEF_SVR("MPC8379E", "MPC8379E",
CPU_POWERPC_MPC837x, POWERPC_SVR_8379E, e300)
/* e500 family */
- POWERPC_DEF("e500_v10", CPU_POWERPC_e500v1_v10, e500v1,
- "PowerPC e500 v1.0 core")
- POWERPC_DEF("e500_v20", CPU_POWERPC_e500v1_v20, e500v1,
- "PowerPC e500 v2.0 core")
- POWERPC_DEF("e500v2_v10", CPU_POWERPC_e500v2_v10, e500v2,
- "PowerPC e500v2 v1.0 core")
- POWERPC_DEF("e500v2_v20", CPU_POWERPC_e500v2_v20, e500v2,
- "PowerPC e500v2 v2.0 core")
- POWERPC_DEF("e500v2_v21", CPU_POWERPC_e500v2_v21, e500v2,
- "PowerPC e500v2 v2.1 core")
- POWERPC_DEF("e500v2_v22", CPU_POWERPC_e500v2_v22, e500v2,
- "PowerPC e500v2 v2.2 core")
- POWERPC_DEF("e500v2_v30", CPU_POWERPC_e500v2_v30, e500v2,
- "PowerPC e500v2 v3.0 core")
+ POWERPC_DEF_SVR("e500_v10", "PowerPC e500 v1.0 core",
+ CPU_POWERPC_e500v1_v10, POWERPC_SVR_E500, e500v1);
+ POWERPC_DEF_SVR("e500_v20", "PowerPC e500 v2.0 core",
+ CPU_POWERPC_e500v1_v20, POWERPC_SVR_E500, e500v1);
+ POWERPC_DEF_SVR("e500v2_v10", "PowerPC e500v2 v1.0 core",
+ CPU_POWERPC_e500v2_v10, POWERPC_SVR_E500, e500v2);
+ POWERPC_DEF_SVR("e500v2_v20", "PowerPC e500v2 v2.0 core",
+ CPU_POWERPC_e500v2_v20, POWERPC_SVR_E500, e500v2);
+ POWERPC_DEF_SVR("e500v2_v21", "PowerPC e500v2 v2.1 core",
+ CPU_POWERPC_e500v2_v21, POWERPC_SVR_E500, e500v2);
+ POWERPC_DEF_SVR("e500v2_v22", "PowerPC e500v2 v2.2 core",
+ CPU_POWERPC_e500v2_v22, POWERPC_SVR_E500, e500v2);
+ POWERPC_DEF_SVR("e500v2_v30", "PowerPC e500v2 v3.0 core",
+ CPU_POWERPC_e500v2_v30, POWERPC_SVR_E500, e500v2);
POWERPC_DEF_SVR("e500mc", "e500mc",
CPU_POWERPC_e500mc, POWERPC_SVR_E500, e500mc)
#ifdef TARGET_PPC64
--
1.8.1.4
- [Qemu-ppc] [PULL 048/118] target-ppc: Introduce DFP Encode BCD to DPD, (continued)
- [Qemu-ppc] [PULL 048/118] target-ppc: Introduce DFP Encode BCD to DPD, Alexander Graf, 2014/06/04
- [Qemu-ppc] [PULL 071/118] PPC: Add u-boot firmware for e500, Alexander Graf, 2014/06/04
- [Qemu-ppc] [PULL 015/118] libdecnumber: Introduce libdecnumber Code, Alexander Graf, 2014/06/04
- [Qemu-ppc] [PULL 057/118] target-arm: Use Common Tables in AES Instructions, Alexander Graf, 2014/06/04
- [Qemu-ppc] [PULL 059/118] KVM: PPC: Don't secretly add 1T segment feature to CPU, Alexander Graf, 2014/06/04
- [Qemu-ppc] [PULL 066/118] PPC: Fix SPR access control of L1CFG0, Alexander Graf, 2014/06/04
- [Qemu-ppc] [PULL 074/118] spapr: Add ibm, chip-id property in device tree, Alexander Graf, 2014/06/04
- [Qemu-ppc] [PULL 073/118] spapr: Add support for time base offset migration, Alexander Graf, 2014/06/04
- [Qemu-ppc] [PULL 027/118] target-ppc: Introduce Generator Macros for DFP Arithmetic Forms, Alexander Graf, 2014/06/04
- [Qemu-ppc] [PULL 061/118] PPC: e500: implement PCI INTx routing, Alexander Graf, 2014/06/04
- [Qemu-ppc] [PULL 064/118] PPC: Make all e500 CPUs SVR aware,
Alexander Graf <=
- [Qemu-ppc] [PULL 050/118] target-ppc: Introduce DFP Insert Biased Exponent, Alexander Graf, 2014/06/04
- [Qemu-ppc] [PULL 058/118] target-ppc: Refactor AES Instructions, Alexander Graf, 2014/06/04
- [Qemu-ppc] [PULL 075/118] macio: handle non-block ATAPI DMA transfers, Alexander Graf, 2014/06/04
- Re: [Qemu-ppc] [PULL 075/118] macio: handle non-block ATAPI DMA transfers, Mark Cave-Ayland, 2014/06/20
- Re: [Qemu-ppc] [PULL 075/118] macio: handle non-block ATAPI DMA transfers, BALATON Zoltan, 2014/06/20
- Re: [Qemu-ppc] [Qemu-devel] [PULL 075/118] macio: handle non-block ATAPI DMA transfers, Mark Cave-Ayland, 2014/06/20
- Re: [Qemu-ppc] [Qemu-devel] [PULL 075/118] macio: handle non-block ATAPI DMA transfers, BALATON Zoltan, 2014/06/20
- Re: [Qemu-ppc] [Qemu-devel] [PULL 075/118] macio: handle non-block ATAPI DMA transfers, Alexander Graf, 2014/06/23
- Re: [Qemu-ppc] [Qemu-devel] [PULL 075/118] macio: handle non-block ATAPI DMA transfers, BALATON Zoltan, 2014/06/23
- Re: [Qemu-ppc] [Qemu-devel] [PULL 075/118] macio: handle non-block ATAPI DMA transfers, Mark Cave-Ayland, 2014/06/23