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Re: Cannot Access Memory


From: Jesse Millwood
Subject: Re: Cannot Access Memory
Date: Tue, 05 Oct 2021 14:20:19 -0400
User-agent: Cyrus-JMAP/3.5.0-alpha0-1322-g921842b88a-fm-20210929.001-g921842b8

Balaton,
Thanks for the -d suggestion. I tried with the ones you suggested and only received this:
(qemu) c
(qemu) invalid/unsupported opcode: 00 - 00 - 00 - 00 (00000000) 00000000

I did add cpu and exec to the logs and at the beginning I do see this: invalid/unsupported opcode: 00 - 00 - 00 - 00 (00000000) 00000000
Trace 0: 0x7fed70000100 [00000000/00000000/24000002/ff000000]
NIP 00000000   LR 00000000 CTR 00000000 XER 00000000 CPU#0
MSR 00000000 HID0 00000000  HF 24000002 iidx 1 didx 1
TB 00000000 00244586 DECR 0
GPR00 0000000000000000 0000000000fffff8 0000000000000000 0000000001800000
GPR04 0000000000000000 0000000000000000 0000000045504150 0000000004000000
GPR08 0000000000000000 0000000000000000 0000000000000000 0000000000000000
GPR12 0000000000000000 0000000000000000 0000000000000000 0000000000000000
GPR16 0000000000000000 0000000000000000 0000000000000000 0000000000000000
GPR20 0000000000000000 0000000000000000 0000000000000000 0000000000000000
GPR24 0000000000000000 0000000000000000 0000000000000000 0000000000000000
GPR28 0000000000000000 0000000000000000 0000000000000000 0000000000000000
CR 00000000  [ -  -  -  -  -  -  -  -  ]             RES ffffffff
SRR0 fff80000  SRR1 00000000    PVR 80210022 VRSAVE 00000000
SPRG0 00000000 SPRG1 00000000  SPRG2 00000000  SPRG3 00000000
SPRG4 00000000 SPRG5 00000000  SPRG6 00000000  SPRG7 00000000
CSRR0 00000000 CSRR1 00000000 MCSRR0 00000000 MCSRR1 00000000
  TCR 00000000   TSR 00000000    ESR 00000000   DEAR fff80000
  PIR 00000000 DECAR 00000000   IVPR 00000000   EPCR 00000000
MCSR 00000000 SPRG8 00000000    EPR 00000000
MCAR 00000000  PID1 00000000   PID2 00000000    SVR 00000000
MAS0 00000001  MAS1 80000000   MAS2 fff80000   MAS3 00000000
MAS4 00000000  MAS6 00000000   MAS7 00000000    PID 00000000
MMUCFG 00000000 TLB0CFG 04110200 TLB1CFG 101cc010
Trace 0: 0x7fed70000100 [00000000/00000000/24000002/ff000000]
NIP 00000000   LR 00000000 CTR 00000000 XER 00000000 CPU#0
MSR 00000000 HID0 00000000  HF 24000002 iidx 1 didx 1
TB 00000000 00273019 DECR 0
GPR00 0000000000000000 0000000000fffff8 0000000000000000 0000000001800000
GPR04 0000000000000000 0000000000000000 0000000045504150 0000000004000000
GPR08 0000000000000000 0000000000000000 0000000000000000 0000000000000000
GPR12 0000000000000000 0000000000000000 0000000000000000 0000000000000000
GPR16 0000000000000000 0000000000000000 0000000000000000 0000000000000000
GPR20 0000000000000000 0000000000000000 0000000000000000 0000000000000000
GPR24 0000000000000000 0000000000000000 0000000000000000 0000000000000000
GPR28 0000000000000000 0000000000000000 0000000000000000 0000000000000000
CR 00000000  [ -  -  -  -  -  -  -  -  ]             RES ffffffff
SRR0 00000000  SRR1 00080000    PVR 80210022 VRSAVE 00000000
SPRG0 00000000 SPRG1 00000000  SPRG2 00000000  SPRG3 00000000
SPRG4 00000000 SPRG5 00000000  SPRG6 00000000  SPRG7 00000000
CSRR0 00000000 CSRR1 00000000 MCSRR0 00000000 MCSRR1 00000000
  TCR 00000000   TSR 00000000    ESR 08000000   DEAR fff80000
  PIR 00000000 DECAR 00000000   IVPR 00000000   EPCR 00000000
MCSR 00000000 SPRG8 00000000    EPR 00000000
MCAR 00000000  PID1 00000000   PID2 00000000    SVR 00000000
MAS0 00000001  MAS1 80000000   MAS2 fff80000   MAS3 00000000
MAS4 00000000  MAS6 00000000   MAS7 00000000    PID 00000000
MMUCFG 00000000 TLB0CFG 04110200 TLB1CFG 101cc010

Where the nip goes back down to 0, which is not what I expected. I can see the first SRR0 register is set to my entry point of the elf. I do see that the exception syndrome register and data exception syndrome register are set as well. I don't really understand why I only see 32 bits for the registers when it looks like bits 32-35 should be cleared. Is there something different with the registers reported by info registers and the the ones listed in the EREF e500 family manual?

Thanks,
----- Original message -----
From: BALATON Zoltan <balaton@eik.bme.hu>
To: Fabiano Rosas <farosas@linux.ibm.com>
Cc: Jesse Millwood <jesse_dev@fastmail.com>, qemu-ppc@nongnu.org
Subject: Re: Cannot Access Memory
Date: Tuesday, October 05, 2021 9:34 AM

On Tue, 5 Oct 2021, Fabiano Rosas wrote:
> "Jesse Millwood" <jesse_dev@fastmail.com> writes:
>
>> Hello,
>>
>> I am a bit new to PowerPC and the guts of QEMU. Long time user, first time source diver. I am trying to boot up a uboot image provided by a vendor that uses the e500 cores. The entry point to the U-boot elf seems to be in a region where I can not access the memory.
>>
>> I am invoking qemu 6.1 like so:
>> qemu-system-ppc -monitor stdio -M ppce500 -cpu e500v2 -smp 2 -m 4G -bios ./srcs/u-boot-vendor/u-boot -s -S
>>
>> The entry point to the vendor elf is in a high address at 0xfff80000.
>> When I run it at first it doesn't print anything out. When I have it stopped and investigate the memory with gdb I get a message that it cannot access memory there:
>
> What does 'info registers' say after it hangs? If it cannot access
> memory I would expect it to raise an exception to QEMU quite
> clearly. Not printing anything suggests it might be stuck in an
> exception loop.

Running with at least -d unimp,guest_errors should be useful to show some 
logs in those cases. Maybe also add some more as needed, see -d help

Regards,
BALATON Zoltan




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