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[RFC v2 53/76] target/riscv: use softfloat lib float16 comparison functi
From: |
frank . chang |
Subject: |
[RFC v2 53/76] target/riscv: use softfloat lib float16 comparison functions |
Date: |
Wed, 22 Jul 2020 17:16:16 +0800 |
From: Frank Chang <frank.chang@sifive.com>
Signed-off-by: Frank Chang <frank.chang@sifive.com>
---
target/riscv/vector_helper.c | 19 -------------------
1 file changed, 19 deletions(-)
diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c
index dc883e0352..95cce063d0 100644
--- a/target/riscv/vector_helper.c
+++ b/target/riscv/vector_helper.c
@@ -4197,12 +4197,6 @@ void HELPER(NAME)(void *vd, void *v0, void *vs1, void
*vs2, \
} \
}
-static bool float16_eq_quiet(uint16_t a, uint16_t b, float_status *s)
-{
- FloatRelation compare = float16_compare_quiet(a, b, s);
- return compare == float_relation_equal;
-}
-
GEN_VEXT_CMP_VV_ENV(vmfeq_vv_h, uint16_t, H2, float16_eq_quiet)
GEN_VEXT_CMP_VV_ENV(vmfeq_vv_w, uint32_t, H4, float32_eq_quiet)
GEN_VEXT_CMP_VV_ENV(vmfeq_vv_d, uint64_t, H8, float64_eq_quiet)
@@ -4258,12 +4252,6 @@ GEN_VEXT_CMP_VF(vmfne_vf_h, uint16_t, H2, vmfne16)
GEN_VEXT_CMP_VF(vmfne_vf_w, uint32_t, H4, vmfne32)
GEN_VEXT_CMP_VF(vmfne_vf_d, uint64_t, H8, vmfne64)
-static bool float16_lt(uint16_t a, uint16_t b, float_status *s)
-{
- FloatRelation compare = float16_compare(a, b, s);
- return compare == float_relation_less;
-}
-
GEN_VEXT_CMP_VV_ENV(vmflt_vv_h, uint16_t, H2, float16_lt)
GEN_VEXT_CMP_VV_ENV(vmflt_vv_w, uint32_t, H4, float32_lt)
GEN_VEXT_CMP_VV_ENV(vmflt_vv_d, uint64_t, H8, float64_lt)
@@ -4271,13 +4259,6 @@ GEN_VEXT_CMP_VF(vmflt_vf_h, uint16_t, H2, float16_lt)
GEN_VEXT_CMP_VF(vmflt_vf_w, uint32_t, H4, float32_lt)
GEN_VEXT_CMP_VF(vmflt_vf_d, uint64_t, H8, float64_lt)
-static bool float16_le(uint16_t a, uint16_t b, float_status *s)
-{
- FloatRelation compare = float16_compare(a, b, s);
- return compare == float_relation_less ||
- compare == float_relation_equal;
-}
-
GEN_VEXT_CMP_VV_ENV(vmfle_vv_h, uint16_t, H2, float16_le)
GEN_VEXT_CMP_VV_ENV(vmfle_vv_w, uint32_t, H4, float32_le)
GEN_VEXT_CMP_VV_ENV(vmfle_vv_d, uint64_t, H8, float64_le)
--
2.17.1
- [RFC v2 48/76] target/riscv: rvv-0.9: widening integer multiply-add instructions, (continued)
- [RFC v2 48/76] target/riscv: rvv-0.9: widening integer multiply-add instructions, frank . chang, 2020/07/22
- [RFC v2 49/76] target/riscv: rvv-0.9: quad-widening integer multiply-add instructions, frank . chang, 2020/07/22
- [RFC v2 50/76] target/riscv: rvv-0.9: single-width saturating add and subtract instructions, frank . chang, 2020/07/22
- [RFC v2 51/76] target/riscv: rvv-0.9: integer comparison instructions, frank . chang, 2020/07/22
- [RFC v2 52/76] fpu: implement full set compare for fp16, frank . chang, 2020/07/22
- [RFC v2 53/76] target/riscv: use softfloat lib float16 comparison functions,
frank . chang <=
- [RFC v2 54/76] target/riscv: rvv-0.9: floating-point compare instructions, frank . chang, 2020/07/22
- [RFC v2 55/76] target/riscv: rvv-0.9: single-width integer reduction instructions, frank . chang, 2020/07/22
- [RFC v2 56/76] target/riscv: rvv-0.9: widening integer reduction instructions, frank . chang, 2020/07/22
- [RFC v2 57/76] target/riscv: rvv-0.9: mask-register logical instructions, frank . chang, 2020/07/22
- [RFC v2 58/76] target/riscv: rvv-0.9: slide instructions, frank . chang, 2020/07/22
- [RFC v2 59/76] target/riscv: rvv-0.9: floating-point slide instructions, frank . chang, 2020/07/22