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[PATCH 01/22] hw/block: m25p80: Add ISSI SPI flash support
From: |
Bin Meng |
Subject: |
[PATCH 01/22] hw/block: m25p80: Add ISSI SPI flash support |
Date: |
Thu, 31 Dec 2020 19:29:49 +0800 |
From: Bin Meng <bin.meng@windriver.com>
This adds the ISSI SPI flash support. The number of dummy cycles in
fast read, fast read dual output and fast read quad output commands
is currently using the default 8. Per the datasheet [1], the number
of dummy cycles configurable, but this is not modeled.
For flash whose size is larger than 16 MiB, the sequence of 3-byte
address along with EXTADD bit in the bank address register (BAR) is
not supported. Currently we assume that guest software will alawys
use op codes with 4-byte address sequence. Fortunately this is the
case for both U-Boot and Linux.
[1] http://www.issi.com/WW/pdf/25LP-WP256.pdf
Signed-off-by: Bin Meng <bin.meng@windriver.com>
---
hw/block/m25p80.c | 38 +++++++++++++++++++++++++++++++++++++-
1 file changed, 37 insertions(+), 1 deletion(-)
diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c
index 844cabea21..8a62bc4bc4 100644
--- a/hw/block/m25p80.c
+++ b/hw/block/m25p80.c
@@ -411,6 +411,7 @@ typedef enum {
MAN_NUMONYX,
MAN_WINBOND,
MAN_SST,
+ MAN_ISSI,
MAN_GENERIC,
} Manufacturer;
@@ -486,6 +487,8 @@ static inline Manufacturer get_man(Flash *s)
return MAN_MACRONIX;
case 0xBF:
return MAN_SST;
+ case 0x9D:
+ return MAN_ISSI;
default:
return MAN_GENERIC;
}
@@ -705,6 +708,9 @@ static void complete_collecting_data(Flash *s)
case MAN_SPANSION:
s->quad_enable = !!(s->data[1] & 0x02);
break;
+ case MAN_ISSI:
+ s->quad_enable = extract32(s->data[0], 6, 1);
+ break;
case MAN_MACRONIX:
s->quad_enable = extract32(s->data[0], 6, 1);
if (s->len > 1) {
@@ -897,6 +903,16 @@ static void decode_fast_read_cmd(Flash *s)
SPANSION_DUMMY_CLK_LEN
);
break;
+ case MAN_ISSI:
+ /*
+ * The fast read instruction code is followed by address bytes and
+ * dummy cycles, transmitted via the SI line.
+ *
+ * The number of dummy cycles are configurable but this is currently
+ * unmodeled, hence the default value 8 is used.
+ */
+ s->needed_bytes += ((8 * 1) / 8);
+ break;
default:
break;
}
@@ -936,6 +952,16 @@ static void decode_dio_read_cmd(Flash *s)
break;
}
break;
+ case MAN_ISSI:
+ /*
+ * The fast read dual I/O instruction code is followed by address bytes
+ * and dummy cycles, transmitted via the IO1 and IO0 line.
+ *
+ * The number of dummy cycles are configurable but this is currently
+ * unmodeled, hence the default value 4 is used.
+ */
+ s->needed_bytes += ((4 * 2) / 8);
+ break;
default:
break;
}
@@ -976,6 +1002,16 @@ static void decode_qio_read_cmd(Flash *s)
break;
}
break;
+ case MAN_ISSI:
+ /*
+ * The fast read quad I/O instruction code is followed by address bytes
+ * and dummy cycles, transmitted via the IO3, IO2, IO1 and IO0 line.
+ *
+ * The number of dummy cycles are configurable but this is currently
+ * unmodeled, hence the default value 6 is used.
+ */
+ s->needed_bytes += ((6 * 4) / 8);
+ break;
default:
break;
}
@@ -1134,7 +1170,7 @@ static void decode_new_cmd(Flash *s, uint32_t value)
case RDSR:
s->data[0] = (!!s->write_enable) << 1;
- if (get_man(s) == MAN_MACRONIX) {
+ if (get_man(s) == MAN_MACRONIX || get_man(s) == MAN_ISSI) {
s->data[0] |= (!!s->quad_enable) << 6;
}
if (get_man(s) == MAN_SST) {
--
2.25.1
- [PATCH 00/22] hw/riscv: sifive_u: Add missing SPI support, Bin Meng, 2020/12/31
- [PATCH 01/22] hw/block: m25p80: Add ISSI SPI flash support,
Bin Meng <=
- [PATCH 02/22] hw/block: m25p80: Add various ISSI flash information, Bin Meng, 2020/12/31
- [PATCH 03/22] hw/sd: ssi-sd: Fix incorrect card response sequence, Bin Meng, 2020/12/31
- [PATCH 04/22] hw/sd: sd: Support CMD59 for SPI mode, Bin Meng, 2020/12/31
- [PATCH 05/22] hw/sd: sd: Drop sd_crc16(), Bin Meng, 2020/12/31
- [PATCH 06/22] util: Add CRC16 (CCITT) calculation routines, Bin Meng, 2020/12/31
- [PATCH 07/22] hw/sd: ssi-sd: Suffix a data block with CRC16, Bin Meng, 2020/12/31
- [PATCH 08/22] hw/sd: ssi-sd: Support multiple block read (CMD18), Bin Meng, 2020/12/31
- [PATCH 11/22] hw/sd: sd: Allow single/multiple block write for SPI mode, Bin Meng, 2020/12/31
- [PATCH 14/22] hw/sd: ssi-sd: Support single block write, Bin Meng, 2020/12/31
- [PATCH 10/22] hw/sd: sd: Remove duplicated codes in single/multiple block read/write, Bin Meng, 2020/12/31