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[PATCH 03/22] hw/sd: ssi-sd: Fix incorrect card response sequence
From: |
Bin Meng |
Subject: |
[PATCH 03/22] hw/sd: ssi-sd: Fix incorrect card response sequence |
Date: |
Thu, 31 Dec 2020 19:29:51 +0800 |
From: Bin Meng <bin.meng@windriver.com>
Per the "Physical Layer Specification Version 8.00" chapter 7.5.1,
"Command/Response", there is a minimum 8 clock cycles (Ncr) before
the card response shows up on the data out line. However current
implementation jumps directly to the sending response state after
all 6 bytes command is received, which is a spec violation.
Add a new state PREP_RESP in the ssi-sd state machine to handle it.
Fixes: 775616c3ae8c ("Partial SD card SPI mode support")
Signed-off-by: Bin Meng <bin.meng@windriver.com>
---
hw/sd/ssi-sd.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/hw/sd/ssi-sd.c b/hw/sd/ssi-sd.c
index 9a75e0095c..228ce4ddc7 100644
--- a/hw/sd/ssi-sd.c
+++ b/hw/sd/ssi-sd.c
@@ -36,6 +36,7 @@ do { fprintf(stderr, "ssi_sd: error: " fmt , ##
__VA_ARGS__);} while (0)
typedef enum {
SSI_SD_CMD = 0,
SSI_SD_CMDARG,
+ SSI_SD_PREP_RESP,
SSI_SD_RESPONSE,
SSI_SD_DATA_START,
SSI_SD_DATA_READ,
@@ -163,12 +164,15 @@ static uint32_t ssi_sd_transfer(SSIPeripheral *dev,
uint32_t val)
s->response[1] = status;
DPRINTF("Card status 0x%02x\n", status);
}
- s->mode = SSI_SD_RESPONSE;
+ s->mode = SSI_SD_PREP_RESP;
s->response_pos = 0;
} else {
s->cmdarg[s->arglen++] = val;
}
return 0xff;
+ case SSI_SD_PREP_RESP:
+ s->mode = SSI_SD_RESPONSE;
+ return 0xff;
case SSI_SD_RESPONSE:
if (s->stopping) {
s->stopping = 0;
--
2.25.1
- [PATCH 00/22] hw/riscv: sifive_u: Add missing SPI support, Bin Meng, 2020/12/31
- [PATCH 01/22] hw/block: m25p80: Add ISSI SPI flash support, Bin Meng, 2020/12/31
- [PATCH 02/22] hw/block: m25p80: Add various ISSI flash information, Bin Meng, 2020/12/31
- [PATCH 03/22] hw/sd: ssi-sd: Fix incorrect card response sequence,
Bin Meng <=
- [PATCH 04/22] hw/sd: sd: Support CMD59 for SPI mode, Bin Meng, 2020/12/31
- [PATCH 05/22] hw/sd: sd: Drop sd_crc16(), Bin Meng, 2020/12/31
- [PATCH 06/22] util: Add CRC16 (CCITT) calculation routines, Bin Meng, 2020/12/31
- [PATCH 07/22] hw/sd: ssi-sd: Suffix a data block with CRC16, Bin Meng, 2020/12/31
- [PATCH 08/22] hw/sd: ssi-sd: Support multiple block read (CMD18), Bin Meng, 2020/12/31
- [PATCH 11/22] hw/sd: sd: Allow single/multiple block write for SPI mode, Bin Meng, 2020/12/31
- [PATCH 14/22] hw/sd: ssi-sd: Support single block write, Bin Meng, 2020/12/31
- [PATCH 10/22] hw/sd: sd: Remove duplicated codes in single/multiple block read/write, Bin Meng, 2020/12/31
- [PATCH 13/22] hw/sd: Introduce receive_ready() callback, Bin Meng, 2020/12/31
- [PATCH 09/22] hw/sd: ssi-sd: Use macros for the dummy value and tokens in the transfer, Bin Meng, 2020/12/31