Re: [qemu-s390x] [Qemu-devel] [PATCH v1 41/41] s390x/tcg: Implement VECTOR TEST UNDER MASK

[David Hildenbrand]

On 13.04.19 08:28, Richard Henderson wrote:
> On 4/11/19 12:08 AM, David Hildenbrand wrote:
>> +void HELPER(gvec_vtm)(void *v1, const void *v2, CPUS390XState *env,
>> +                      uint32_t desc)
>> +{
>> +    S390Vector tmp;
>> +
>> +    s390_vec_and(&tmp, v1, v2);
>> +    if (s390_vec_is_zero(&tmp)) {
>> +        /* Selected bits all zeros; or all mask bits zero */
>> +        env->cc_op = 0;
>> +    } else if (s390_vec_equal(&tmp, v2)) {
>> +        /* Selected bits all ones */
>> +        env->cc_op = 3;
>> +    } else {
>> +        /* Selected bits a mix of zeros and ones */
>> +        env->cc_op = 1;
>> +    }
>> +}
> 
> Reviewed-by: Richard Henderson <address@hidden>
> 
> However, if you return this value, then you can do
> 
> DEF_HELPER_FLAGS_4(gvec_vtm, TCG_CALL_NO_RWG_SE, i32, cptr, cptr)
> 
> static DisasJumpType op_vtm(DisasContext *s, DisasOps *o)
> {
>     TCGv_ptr p1 = tcg_temp_new_ptr();
>     TCGv_ptr p2 = tcg_temp_new_ptr();
> 
>     tcg_gen_addi_ptr(p1, cpu_env,
>         vec_full_reg_offset(get_field(s->fields, v1)));
>     tcg_gen_addi_ptr(p2, cpu_env,
>         vec_full_reg_offset(get_field(s->fields, v2)));
>     gen_helper_gvec_vtm(cc_op, p1, p2);
>     tcg_temp_free_ptr(p1);
>     tcg_temp_free_ptr(p2);
>     set_cc_static(s);
>     return DISAS_NEXT;
> }
> 
> Perhaps it doesn't matter though, since use of vtm probably implies a jump,
> which implies end of TB, which means that registers are going to get saved to
> backing store anyway.

Had a similar idea, but I guess it doesn't really matter. This way, we
can at least use standardized gvec ool helpers. Will leave it as is for
now, thanks!


-- 

Thanks,

David / dhildenb