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[PATCH v2 16/26] s390x/tcg: Implement 32/128 bit for VECTOR FP COMPARE (
From: |
David Hildenbrand |
Subject: |
[PATCH v2 16/26] s390x/tcg: Implement 32/128 bit for VECTOR FP COMPARE (AND SIGNAL) SCALAR |
Date: |
Mon, 17 May 2021 16:27:29 +0200 |
Signed-off-by: David Hildenbrand <david@redhat.com>
---
target/s390x/helper.h | 4 +++
target/s390x/translate_vx.c.inc | 38 ++++++++++++++++++++++------
target/s390x/vec_fpu_helper.c | 44 ++++++++++++++++++++++++++++++++-
3 files changed, 77 insertions(+), 9 deletions(-)
diff --git a/target/s390x/helper.h b/target/s390x/helper.h
index 146836126c..dca436f710 100644
--- a/target/s390x/helper.h
+++ b/target/s390x/helper.h
@@ -250,8 +250,12 @@ DEF_HELPER_6(gvec_vstrc_cc_rt32, void, ptr, cptr, cptr,
cptr, env, i32)
DEF_HELPER_FLAGS_5(gvec_vfa32, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
DEF_HELPER_FLAGS_5(gvec_vfa64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
DEF_HELPER_FLAGS_5(gvec_vfa128, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env,
i32)
+DEF_HELPER_4(gvec_wfc32, void, cptr, cptr, env, i32)
+DEF_HELPER_4(gvec_wfk32, void, cptr, cptr, env, i32)
DEF_HELPER_4(gvec_wfc64, void, cptr, cptr, env, i32)
DEF_HELPER_4(gvec_wfk64, void, cptr, cptr, env, i32)
+DEF_HELPER_4(gvec_wfc128, void, cptr, cptr, env, i32)
+DEF_HELPER_4(gvec_wfk128, void, cptr, cptr, env, i32)
DEF_HELPER_FLAGS_5(gvec_vfce32, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env,
i32)
DEF_HELPER_5(gvec_vfce32_cc, void, ptr, cptr, cptr, env, i32)
DEF_HELPER_FLAGS_5(gvec_vfce64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env,
i32)
diff --git a/target/s390x/translate_vx.c.inc b/target/s390x/translate_vx.c.inc
index 6f6ef6b6b8..822a9d0513 100644
--- a/target/s390x/translate_vx.c.inc
+++ b/target/s390x/translate_vx.c.inc
@@ -2598,19 +2598,41 @@ static DisasJumpType op_wfc(DisasContext *s, DisasOps
*o)
{
const uint8_t fpf = get_field(s, m3);
const uint8_t m4 = get_field(s, m4);
+ gen_helper_gvec_2_ptr *fn = NULL;
- if (fpf != FPF_LONG || m4) {
+ switch (fpf) {
+ case FPF_SHORT:
+ if (s390_has_feat(S390_FEAT_VECTOR_ENH)) {
+ fn = gen_helper_gvec_wfk32;
+ if (s->fields.op2 == 0xcb) {
+ fn = gen_helper_gvec_wfc32;
+ }
+ }
+ break;
+ case FPF_LONG:
+ fn = gen_helper_gvec_wfk64;
+ if (s->fields.op2 == 0xcb) {
+ fn = gen_helper_gvec_wfc64;
+ }
+ break;
+ case FPF_EXT:
+ if (s390_has_feat(S390_FEAT_VECTOR_ENH)) {
+ fn = gen_helper_gvec_wfk128;
+ if (s->fields.op2 == 0xcb) {
+ fn = gen_helper_gvec_wfc128;
+ }
+ }
+ break;
+ default:
+ break;
+ };
+
+ if (!fn || m4) {
gen_program_exception(s, PGM_SPECIFICATION);
return DISAS_NORETURN;
}
- if (s->fields.op2 == 0xcb) {
- gen_gvec_2_ptr(get_field(s, v1), get_field(s, v2),
- cpu_env, 0, gen_helper_gvec_wfc64);
- } else {
- gen_gvec_2_ptr(get_field(s, v1), get_field(s, v2),
- cpu_env, 0, gen_helper_gvec_wfk64);
- }
+ gen_gvec_2_ptr(get_field(s, v1), get_field(s, v2), cpu_env, 0, fn);
set_cc_static(s);
return DISAS_NEXT;
}
diff --git a/target/s390x/vec_fpu_helper.c b/target/s390x/vec_fpu_helper.c
index 6fff3e9f01..ab16ed4e24 100644
--- a/target/s390x/vec_fpu_helper.c
+++ b/target/s390x/vec_fpu_helper.c
@@ -309,6 +309,26 @@ DEF_GVEC_VOP3(vfs, sub)
DEF_GVEC_VOP3(vfd, div)
DEF_GVEC_VOP3(vfm, mul)
+static int wfc32(const S390Vector *v1, const S390Vector *v2,
+ CPUS390XState *env, bool signal, uintptr_t retaddr)
+{
+ /* only the zero-indexed elements are compared */
+ const float32 a = s390_vec_read_float32(v1, 0);
+ const float32 b = s390_vec_read_float32(v2, 0);
+ uint8_t vxc, vec_exc = 0;
+ int cmp;
+
+ if (signal) {
+ cmp = float32_compare(a, b, &env->fpu_status);
+ } else {
+ cmp = float32_compare_quiet(a, b, &env->fpu_status);
+ }
+ vxc = check_ieee_exc(env, 0, false, &vec_exc);
+ handle_ieee_exc(env, vxc, vec_exc, retaddr);
+
+ return float_comp_to_cc(env, cmp);
+}
+
static int wfc64(const S390Vector *v1, const S390Vector *v2,
CPUS390XState *env, bool signal, uintptr_t retaddr)
{
@@ -329,6 +349,26 @@ static int wfc64(const S390Vector *v1, const S390Vector
*v2,
return float_comp_to_cc(env, cmp);
}
+static int wfc128(const S390Vector *v1, const S390Vector *v2,
+ CPUS390XState *env, bool signal, uintptr_t retaddr)
+{
+ /* only the zero-indexed elements are compared */
+ const float128 a = s390_vec_read_float128(v1);
+ const float128 b = s390_vec_read_float128(v2);
+ uint8_t vxc, vec_exc = 0;
+ int cmp;
+
+ if (signal) {
+ cmp = float128_compare(a, b, &env->fpu_status);
+ } else {
+ cmp = float128_compare_quiet(a, b, &env->fpu_status);
+ }
+ vxc = check_ieee_exc(env, 0, false, &vec_exc);
+ handle_ieee_exc(env, vxc, vec_exc, retaddr);
+
+ return float_comp_to_cc(env, cmp);
+}
+
#define DEF_GVEC_WFC_B(NAME, SIGNAL, BITS)
\
void HELPER(gvec_##NAME##BITS)(const void *v1, const void *v2,
\
CPUS390XState *env, uint32_t desc)
\
@@ -337,7 +377,9 @@ void HELPER(gvec_##NAME##BITS)(const void *v1, const void
*v2, \
}
#define DEF_GVEC_WFC(NAME, SIGNAL)
\
- DEF_GVEC_WFC_B(NAME, SIGNAL, 64)
+ DEF_GVEC_WFC_B(NAME, SIGNAL, 32)
\
+ DEF_GVEC_WFC_B(NAME, SIGNAL, 64)
\
+ DEF_GVEC_WFC_B(NAME, SIGNAL, 128)
DEF_GVEC_WFC(wfc, false)
DEF_GVEC_WFC(wfk, true)
--
2.31.1
- [PATCH v2 05/26] s390x/tcg: Simplify vfc64() handling, (continued)
- [PATCH v2 05/26] s390x/tcg: Simplify vfc64() handling, David Hildenbrand, 2021/05/17
- [PATCH v2 03/26] s390x/tcg: Simplify vop64_3() handling, David Hildenbrand, 2021/05/17
- [PATCH v2 07/26] s390x/tcg: Simplify vfma64() handling, David Hildenbrand, 2021/05/17
- [PATCH v2 08/26] s390x/tcg: Simplify vfll32() handling, David Hildenbrand, 2021/05/17
- [PATCH v2 06/26] s390x/tcg: Simplify vftci64() handling, David Hildenbrand, 2021/05/17
- [PATCH v2 09/26] s390x/tcg: Simplify vflr64() handling, David Hildenbrand, 2021/05/17
- [PATCH v2 10/26] s390x/tcg: Simplify wfc64() handling, David Hildenbrand, 2021/05/17
- [PATCH v2 11/26] s390x/tcg: Implement VECTOR BIT PERMUTE, David Hildenbrand, 2021/05/17
- [PATCH v2 13/26] s390x/tcg: Implement 32/128 bit for VECTOR FP (ADD|DIVIDE|MULTIPLY|SUBTRACT), David Hildenbrand, 2021/05/17
- [PATCH v2 14/26] s390x/tcg: Implement 32/128 bit for VECTOR (LOAD FP INTEGER|FP SQUARE ROOT), David Hildenbrand, 2021/05/17
- [PATCH v2 16/26] s390x/tcg: Implement 32/128 bit for VECTOR FP COMPARE (AND SIGNAL) SCALAR,
David Hildenbrand <=
- [PATCH v2 17/26] s390x/tcg: Implement 64 bit for VECTOR FP LOAD LENGTHENED, David Hildenbrand, 2021/05/17
- [PATCH v2 18/26] s390x/tcg: Implement 128 bit for VECTOR FP LOAD ROUNDED, David Hildenbrand, 2021/05/17
- [PATCH v2 12/26] s390x/tcg: Implement VECTOR MULTIPLY SUM LOGICAL, David Hildenbrand, 2021/05/17
- [PATCH v2 19/26] s390x/tcg: Implement 32/128 bit for VECTOR FP PERFORM SIGN OPERATION, David Hildenbrand, 2021/05/17
- [PATCH v2 15/26] s390x/tcg: Implement 32/128 bit for VECTOR FP COMPARE *, David Hildenbrand, 2021/05/17
- [PATCH v2 20/26] s390x/tcg: Implement 32/128 bit for VECTOR FP TEST DATA CLASS IMMEDIATE, David Hildenbrand, 2021/05/17
- [PATCH v2 21/26] s390x/tcg: Implement 32/128 bit for VECTOR FP MULTIPLY AND (ADD|SUBTRACT), David Hildenbrand, 2021/05/17
- [PATCH v2 22/26] s390x/tcg: Implement VECTOR FP NEGATIVE MULTIPLY AND (ADD|SUBTRACT), David Hildenbrand, 2021/05/17
- [PATCH v2 23/26] softfloat: Implement float128_(min|minnum|minnummag|max|maxnum|maxnummag), David Hildenbrand, 2021/05/17
- [PATCH v2 24/26] s390x/tcg: Implement VECTOR FP (MAXIMUM|MINIMUM), David Hildenbrand, 2021/05/17