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From: | Steven Rubin |
Subject: | Re: Using EDIF files in Electric - Please Help |
Date: | Fri, 06 Nov 2009 07:28:05 -0800 |
At 07:13 PM 11/5/2009, you wrote:
I am new to the Electric tool. I have a EDIF file that has been generated from a Verilog source file. I would like to analyze this further using Elecric. Looking through the online documentationI find that Electric can read in EDIF format.So, after reading in the file, what sort of analysis could we do with this input ? I am interested in area, power and so forth. Could someone please provide some pointers in this regard ? Any hints, suggestions would be greatly appreciated. Thanks in advance for your help.
Electric can read both EDIF schematics and layout. However Electric supports only simple EDIF (version 2 0 0).
When reading layout, the circuit appears as unconnected pieces of geometry instead of connected transistors and contacts. Some of Electric's tools won't care (such as GDS output, which will be correct). Other tools will not work well, such as NCC (Electric's LVS). Even the design-rule checker makes use of connectivity and will have problems. You can try running Electric's node extractor, but that doesn't always work, and you may have to hand-edit the circuit to make full use of Electric.
When reading schematics, you should have a correctly constructed set of schematics which have been laid-out on a regular grid. You can simulate them and LVS them.
-Steven Rubin
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