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Re: writing to make file
From: |
micron_make |
Subject: |
Re: writing to make file |
Date: |
Wed, 1 Aug 2007 02:16:36 -0700 (PDT) |
Paul Smith-20 wrote:
>
> On Tue, 2007-07-31 at 22:40 -0700, micron_make wrote:
>> In one of my make make files I do the following:
>> files_path=$(abspath $(wildcard ../src/*.c))
>> filt=$(subst /, ,$(files_path))
>> mod_name_filter=$(filter Module_%,$(filt))
>> MODULE_NAME=$(mod_name_filter)
>
> Weird, but OK. I really, really think you want to be using := (simple)
> assignment here, though, not = (recursive) assignment.
>
>> $(MODULE_NAME) will contain the directory name I want (i.e. the name
>> Module_ followed by any text)
>
> It could possibly even contain more than one.
>
>> I have included this make file in another make file which uses
>> $(MODULE_NAME). This works fine.
>>
>> What I actually want is , instead of referencing the variable
>> MODULE_NAME, I need to paste its value (i.e. the text Module_ followed
>> by any text). This is required since my module specific make files are
>> supposed to contain the name of the directory and not a generic
>> reference. I understand this would require some kind of file write
>> operation.
>
> I really don't know what you mean by "paste its value" and "require some
> kind of file write operation". Are you trying to create a new makefile,
> or change an existing one, by adding that value to it in some way? Why
> not just use the variable?
>
> --
> -------------------------------------------------------------------------------
> Paul D. Smith <address@hidden> Find some GNU make tips at:
> http://www.gnu.org http://make.paulandlesley.org
> "Please remain calm...I may be mad, but I am a professional." --Mad
> Scientist
>
>
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>
>
Issue:
I have to deliver different modules with their own makefiles which contain
some definitions regarding paths of source files/include files etc. The
delivered makefiles should explicitly contain the path/directory names i.e.
absolute paths.(eg for path C:\proj\Module_Test1\, eg for directory
Module_Test1). I do not want to hand code each path, so I use the above said
method to extract all the relevant info (see my MODULE_NAME usage above).
Say my MODULE_NAME (from say file1.mak) variable gets the value
Module_Test1.
In my another make file (say file2.mak) I can use:
MODULE_SOURCE_FILE_PATH=$(MODULE_NAME)/src (1)
But I do not want to reference the variable MODULE_NAME here but actually
want its value (this is the requirement) i.e
MODULE_SOURCE_FILE_PATH=Module_Test1/src (2)
The issue is once I get the value into MODULE_NAME, what should I do to
print its value (in a make file) where I want as in (2) than referencing it
as in (1).
cheers!!
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